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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-07-09 18:19:05 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-10-20 16:41:21 +0000 |
| commit | 0d441daef6e7ca4d43360058b960ccab8d2d21b5 (patch) | |
| tree | 61e65df47baafa71bc9d64b3659bc1cb8dfdece9 /src/soc | |
| parent | ecd36ce759cfb28402532f998f81a3344d1fb296 (diff) | |
| download | coreboot-0d441daef6e7ca4d43360058b960ccab8d2d21b5.tar.xz | |
soc/amd/picasso: Add display identification and vbios name
Add Picasso's Device ID and default filename.
Only a single Device ID is documented for Picasso so remove the oprom
remapper function.
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Iaf43d7c8da41beb05b58c494f0a6814f8f571b18
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34422
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/pci_devs.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/picasso/northbridge.c | 17 |
3 files changed, 3 insertions, 20 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 33e8c81582..6d0a3efff4 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -111,14 +111,14 @@ config MMCONF_BUS_NUMBER config VGA_BIOS_ID string - default "1002,98e4" + default "1002,15d8" help The default VGA BIOS PCI vendor/device ID should be set to the result of the map_oprom_vendev() function in northbridge.c. config VGA_BIOS_FILE string - default "3rdparty/blobs/soc/amd/picasso/VBIOS.bin" + default "3rdparty/blobs/soc/amd/picasso/PicassoGenericVbios.bin" config S3_VGA_ROM_RUN bool diff --git a/src/soc/amd/picasso/include/soc/pci_devs.h b/src/soc/amd/picasso/include/soc/pci_devs.h index d6887f9b38..acde4558b1 100644 --- a/src/soc/amd/picasso/include/soc/pci_devs.h +++ b/src/soc/amd/picasso/include/soc/pci_devs.h @@ -42,7 +42,7 @@ /* Internal Graphics */ #define GFX_DEV 0x1 #define GFX_FUNC 0 -#define GFX_DEVID 0x98e4 /* subject to SKU/OPN variation */ +#define GFX_DEVID 0x15d8 #define GFX_DEVFN PCI_DEVFN(GFX_DEV, GFX_FUNC) #define SOC_GFX_DEV _SOC_DEV(GFX_DEV, GFX_FUNC) diff --git a/src/soc/amd/picasso/northbridge.c b/src/soc/amd/picasso/northbridge.c index 36135f989e..08807f3321 100644 --- a/src/soc/amd/picasso/northbridge.c +++ b/src/soc/amd/picasso/northbridge.c @@ -310,20 +310,3 @@ void domain_set_resources(struct device *dev) assign_resources(dev->link_list); } - -/********************************************************************* - * Change the vendor / device IDs to match the generic VBIOS header. * - *********************************************************************/ -u32 map_oprom_vendev(u32 vendev) -{ - u32 new_vendev; - new_vendev = - ((vendev >= 0x100298e0) && (vendev <= 0x100298ef)) ? - 0x100298e0 : vendev; - - if (vendev != new_vendev) - printk(BIOS_NOTICE, "Mapping PCI device %8x to %8x\n", - vendev, new_vendev); - - return new_vendev; -} |