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authorChristian Walter <christian.walter@9elements.com>2020-09-30 13:44:02 +0200
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2020-10-09 16:25:11 +0000
commit19df8d85e046849a8bdf4aebbd8dfbd774bea9ce (patch)
tree698eefe22c6984530eb39289658960c06d06c9a9 /src/soc
parent1c3fef2ca93dcdf2bca81a486fd3120476196760 (diff)
downloadcoreboot-19df8d85e046849a8bdf4aebbd8dfbd774bea9ce.tar.xz
soc/intel/xeon_sp: Set CPU_ADDR_BITS to 46 for SKX and CPX
According to document number 338846 and 336062 this should be set to 46 bits. Change-Id: I0bbe6c962ffc7d5dc722f1cacf55bc0d0615db59 Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45868 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/xeon_sp/cpx/Kconfig4
-rw-r--r--src/soc/intel/xeon_sp/skx/Kconfig4
2 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
index 8e7e6f1094..975afc9e26 100644
--- a/src/soc/intel/xeon_sp/cpx/Kconfig
+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
@@ -15,6 +15,10 @@ config MAX_CPUS
int
default 255
+config CPU_ADDR_BITS
+ int
+ default 46
+
config PCR_BASE_ADDRESS
hex
default 0xfd000000
diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig
index 0e3e699de6..2e0778ee12 100644
--- a/src/soc/intel/xeon_sp/skx/Kconfig
+++ b/src/soc/intel/xeon_sp/skx/Kconfig
@@ -15,6 +15,10 @@ config MAX_SOCKET
int
default 2
+config CPU_ADDR_BITS
+ int
+ default 46
+
# For 2S config, the number of cpus could be as high as
# 2 threads * 20 cores * 2 sockets
config MAX_CPUS