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| author | V Sowmya <v.sowmya@intel.com> | 2020-12-03 23:15:37 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-12-05 05:36:41 +0000 |
| commit | 2c9d65b51b9ed5af092434d1172a43628ef068d5 (patch) | |
| tree | 71f84575c0b31f6fb22f76c262f3c6006d8ecc8e /src/soc | |
| parent | 5fc798f40e994b57047512a9fa6ff9a13630cfa4 (diff) | |
| download | coreboot-2c9d65b51b9ed5af092434d1172a43628ef068d5.tar.xz | |
soc/intel/common/block/usb4: Add the PCI ID for ADL
This patch adds the PCI device ID for Alderlake
CPU xHCI.
Change-Id: I4074a81aa9be2ef3a0956da08bece32a613415ab
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/usb4/xhci.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/usb4/xhci.c b/src/soc/intel/common/block/usb4/xhci.c index 4fe60dd91a..d4fb3e2432 100644 --- a/src/soc/intel/common/block/usb4/xhci.c +++ b/src/soc/intel/common/block/usb4/xhci.c @@ -27,6 +27,7 @@ static struct device_operations usb4_xhci_ops = { static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI, + PCI_DEVICE_ID_INTEL_ADP_TCSS_XHCI, 0 }; |