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| author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2020-08-31 18:41:15 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-08 05:20:55 +0000 |
| commit | 4fb3a40679adcb2672cd6e97a4266fac21046c7a (patch) | |
| tree | 3e4e17b023d2ea678dc49e1892ad76c1c1d57ba5 /src/soc | |
| parent | 80518ee5124209adbe42c2613900b670695a5763 (diff) | |
| download | coreboot-4fb3a40679adcb2672cd6e97a4266fac21046c7a.tar.xz | |
mb/intel/jasperlake_rvp: Add DTT support for jslrvp
Add DTT (Dynamic Tuning Technology) support for Jasper Lake based rvp board.
Set power limits and CPU sensor thresholds for DTT based thermal control.
BRANCH=None
BUG=Noe
TEST=Build and boot on jslrvp board
Change-Id: I41409c70d8472c54ca452fc98d5ee9edf3ccd307
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44942
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc')
0 files changed, 0 insertions, 0 deletions