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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-18 09:00:04 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-30 02:59:22 +0000 |
commit | 67a26c9dcdef3ab2119d0ccd7ca4ea59824df8ab (patch) | |
tree | 517f76f247866ce605ae667ab7d449ab39f2c2cc /src/soc | |
parent | 792098c45e5bf95ab08fe01a9a973ca35deadc55 (diff) | |
download | coreboot-67a26c9dcdef3ab2119d0ccd7ca4ea59824df8ab.tar.xz |
intel/quark: Remove extra steps on entry to romstage
Change-Id: I9297d5b4f7c8ed703fb8772739531cdd7d5ca5f0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34965
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/quark/include/soc/romstage.h | 1 | ||||
-rw-r--r-- | src/soc/intel/quark/romstage/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/quark/romstage/car_stage_entry.S | 72 | ||||
-rw-r--r-- | src/soc/intel/quark/romstage/fsp2_0.c | 2 |
4 files changed, 1 insertions, 75 deletions
diff --git a/src/soc/intel/quark/include/soc/romstage.h b/src/soc/intel/quark/include/soc/romstage.h index c7de080146..29f934eb8e 100644 --- a/src/soc/intel/quark/include/soc/romstage.h +++ b/src/soc/intel/quark/include/soc/romstage.h @@ -25,7 +25,6 @@ #include <soc/car.h> #include <soc/reg_access.h> -asmlinkage void car_stage_c_entry(void); void clear_smi_and_wake_events(void); void disable_rom_shadow(void); void *locate_rmu_file(size_t *rmu_file_len); diff --git a/src/soc/intel/quark/romstage/Makefile.inc b/src/soc/intel/quark/romstage/Makefile.inc index 742a4faba7..be5b320351 100644 --- a/src/soc/intel/quark/romstage/Makefile.inc +++ b/src/soc/intel/quark/romstage/Makefile.inc @@ -14,7 +14,6 @@ # romstage-y += car.c -romstage-y += car_stage_entry.S ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y) romstage-$(CONFIG_DISPLAY_UPD_DATA) += debug.c romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp2_0.c diff --git a/src/soc/intel/quark/romstage/car_stage_entry.S b/src/soc/intel/quark/romstage/car_stage_entry.S deleted file mode 100644 index c9847eaac7..0000000000 --- a/src/soc/intel/quark/romstage/car_stage_entry.S +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com> - * Copyright (C) 2007-2008 coresystems GmbH - * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. - * Copyright (C) 2015-2016 Intel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Replacement for cache_as_ram.inc when using the C environment boot block. - */ - -#include <rules.h> -#include <soc/sd.h> - - .section ".text" - .global car_stage_entry - -car_stage_entry: - - /* Enter the C code */ - call car_stage_c_entry - - /* The code should never reach this point */ - movb $0x69, %ah - jmp .Lhlt - -#---------------------------------------------------------------------------- -# -# Procedure: .Lhlt -# -# Input: ah - Upper 8-bits of POST code -# al - Lower 8-bits of POST code -# -# Description: -# Infinite loop displaying alternating POST code values -# -#---------------------------------------------------------------------------- - -#define FLASH_DELAY 0x1000 /* I/O delay between post codes on failure */ -#define POST_DELAY 0x50 - -.Lhlt: - xchg %al, %ah - mov $POST_DELAY, %dh -#if CONFIG(POST_IO) - outb %al, $CONFIG_POST_IO_PORT -#else - post_code(POST_DEAD_CODE) -#endif -.flash_setup: - movl $FLASH_DELAY, %ecx -.flash_delay: - outb %al, $0xED - loop .flash_delay -#if CONFIG(ENABLE_DEBUG_LED) - movl $SD_HOST_CTRL, %ebx - movb 0(%ebx), %dl - xorb $1, %dl - movb %dl, 0(%ebx) -#endif /* CONFIG_ENABLE_DEBUG_LED */ - decb %dh - jnz .flash_setup - jmp .Lhlt diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c index 57e35eeb3c..b3f3ee8cb6 100644 --- a/src/soc/intel/quark/romstage/fsp2_0.c +++ b/src/soc/intel/quark/romstage/fsp2_0.c @@ -30,7 +30,7 @@ static struct postcar_frame early_mtrrs; -asmlinkage void car_stage_c_entry(void) +asmlinkage void car_stage_entry(void) { bool s3wake; |