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authorJulius Werner <jwerner@chromium.org>2018-05-14 11:43:30 -0700
committerJulius Werner <jwerner@chromium.org>2018-05-22 02:44:33 +0000
commit8f25a6680e23663f4c88f7fe61a7a62e8fe284c4 (patch)
treebb18eb627d3381267506d9fa1ff762c0c905f30d /src/soc
parent99f4683adf3203d11c164b15a5455e778709a3e0 (diff)
downloadcoreboot-8f25a6680e23663f4c88f7fe61a7a62e8fe284c4.tar.xz
rk3399: Enable bootblock compression
This patch enables the new bootblock compression feature on RK3399, which requires moving MMU initialization into the decompressor stage and linking the decompressor (rather than the bootblock) into the entry point jumped to by the masked ROM. RK3399's masked ROM seems to be using a bitbang SPI driver to load us (very long pauses between clocking in each byte), with an effective data rate of about 1Mbit. Bootblock loading time (as measured on a SPI analyzer) is reduced by almost 100ms (about a third), while the decompression time is trivial (under 1ms). Change-Id: I48967ca5bb51cc4481d69dbacb4ca3c6b96cccea Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/26341 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/rockchip/rk3399/Kconfig1
-rw-r--r--src/soc/rockchip/rk3399/Makefile.inc5
-rw-r--r--src/soc/rockchip/rk3399/bootblock.c2
-rw-r--r--src/soc/rockchip/rk3399/decompressor.c (renamed from src/soc/rockchip/rk3399/mmu_operations.c)2
-rw-r--r--src/soc/rockchip/rk3399/include/soc/memlayout.ld5
-rw-r--r--src/soc/rockchip/rk3399/include/soc/mmu_operations.h1
6 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/rockchip/rk3399/Kconfig b/src/soc/rockchip/rk3399/Kconfig
index 7bc923efce..1d2960be1f 100644
--- a/src/soc/rockchip/rk3399/Kconfig
+++ b/src/soc/rockchip/rk3399/Kconfig
@@ -13,6 +13,7 @@ config SOC_ROCKCHIP_RK3399
select HAVE_MONOTONIC_TIMER
select UART_OVERRIDE_REFCLK
select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
+ select COMPRESS_BOOTBLOCK
if SOC_ROCKCHIP_RK3399
diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc
index 54c51152af..b9c380390c 100644
--- a/src/soc/rockchip/rk3399/Makefile.inc
+++ b/src/soc/rockchip/rk3399/Makefile.inc
@@ -17,6 +17,9 @@ ifeq ($(CONFIG_SOC_ROCKCHIP_RK3399),y)
IDBTOOL = util/rockchip/make_idb.py
+decompressor-y += decompressor.c
+decompressor-y += timer.c
+
bootblock-y += ../common/i2c.c
bootblock-y += ../common/spi.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
@@ -27,7 +30,6 @@ bootblock-y += ../common/pwm.c
bootblock-y += bootblock.c
bootblock-y += clock.c
bootblock-y += gpio.c
-bootblock-y += mmu_operations.c
bootblock-y += saradc.c
bootblock-y += timer.c
@@ -48,7 +50,6 @@ romstage-y += sdram.c
romstage-y += ../common/spi.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
romstage-y += clock.c
-romstage-y += mmu_operations.c
romstage-y += ../common/pwm.c
romstage-y += timer.c
romstage-y += tsadc.c
diff --git a/src/soc/rockchip/rk3399/bootblock.c b/src/soc/rockchip/rk3399/bootblock.c
index 7b80a75e33..52651564c4 100644
--- a/src/soc/rockchip/rk3399/bootblock.c
+++ b/src/soc/rockchip/rk3399/bootblock.c
@@ -34,6 +34,4 @@ void bootblock_soc_init(void)
/* glb_slv_secure_bypass */
write32(&rk3399_pmusgrf->pmu_slv_con0, 1 << 16 | 1);
-
- rockchip_mmu_init();
}
diff --git a/src/soc/rockchip/rk3399/mmu_operations.c b/src/soc/rockchip/rk3399/decompressor.c
index f1a1371683..7d3c71478b 100644
--- a/src/soc/rockchip/rk3399/mmu_operations.c
+++ b/src/soc/rockchip/rk3399/decompressor.c
@@ -21,7 +21,7 @@
#include <soc/mmu_operations.h>
#include <symbols.h>
-void rockchip_mmu_init(void)
+void decompressor_soc_init(void)
{
mmu_init();
diff --git a/src/soc/rockchip/rk3399/include/soc/memlayout.ld b/src/soc/rockchip/rk3399/include/soc/memlayout.ld
index 04ffce66ce..e181a35307 100644
--- a/src/soc/rockchip/rk3399/include/soc/memlayout.ld
+++ b/src/soc/rockchip/rk3399/include/soc/memlayout.ld
@@ -31,8 +31,9 @@ SECTIONS
SRAM_START(0xFF8C0000)
PRERAM_CBFS_CACHE(0xFF8C0000, 7K)
TIMESTAMP(0xFF8C1C00, 1K)
- BOOTBLOCK(0xFF8C2004, 36K - 4)
- OVERLAP_VERSTAGE_ROMSTAGE(0xFF8CB000, 92K)
+ /* 0xFF8C2004 is the entry point address the masked ROM will jump to. */
+ OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0xFF8C2004, 88K - 4)
+ BOOTBLOCK(0xFF8D8000, 40K)
VBOOT2_WORK(0XFF8E2000, 12K)
TTB(0xFF8E5000, 24K)
PRERAM_CBMEM_CONSOLE(0xFF8EB000, 8K)
diff --git a/src/soc/rockchip/rk3399/include/soc/mmu_operations.h b/src/soc/rockchip/rk3399/include/soc/mmu_operations.h
index d8a6016349..5f06a451c1 100644
--- a/src/soc/rockchip/rk3399/include/soc/mmu_operations.h
+++ b/src/soc/rockchip/rk3399/include/soc/mmu_operations.h
@@ -26,5 +26,4 @@ enum {
UNCACHED_MEM = MA_MEM | MA_NS | MA_RW | MA_MEM_NC,
};
-void rockchip_mmu_init(void);
#endif