diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-16 20:34:25 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-22 02:50:35 +0000 |
| commit | a963acdcc70747911981afcd1474d39d75ca8804 (patch) | |
| tree | 57f67998627e588d8523497172512dba7b0032fb /src/soc | |
| parent | 9ede2ffee845d243d8e1515effbc206152fbc7fd (diff) | |
| download | coreboot-a963acdcc70747911981afcd1474d39d75ca8804.tar.xz | |
arch/x86: Add <arch/romstage.h>
Start with moving all postcar_frame related function
declarations here from <arch/cpu.h>.
Change-Id: I9aeef07f9009e44cc08927c85fe1862edf5c70dc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34911
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/picasso/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/romstage/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/romstage/romstage.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/romstage/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/denverton_ns/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/icelake/romstage/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/quark/romstage/fsp2_0.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 1 |
10 files changed, 10 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index 7970b0edda..4f18b42276 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -16,6 +16,7 @@ #include <device/pci_ops.h> #include <arch/cpu.h> +#include <arch/romstage.h> #include <arch/acpi.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index c76f7cd80c..0d65ef6c82 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -16,6 +16,7 @@ #include <device/pci_ops.h> #include <arch/cpu.h> +#include <arch/romstage.h> #include <arch/acpi.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index fb8473c512..1464d2c6b3 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -17,6 +17,7 @@ */ #include <arch/cpu.h> +#include <arch/romstage.h> #include <device/pci_ops.h> #include <arch/symbols.h> #include <assert.h> diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 63e36aaa36..f20c363a35 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -16,6 +16,7 @@ #include <stddef.h> #include <arch/cpu.h> #include <arch/io.h> +#include <arch/romstage.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <bootblock_common.h> diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index e7b8ae0180..3f264ff5ec 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -16,7 +16,7 @@ #include <stddef.h> #include <stdint.h> #include <arch/cbfs.h> -#include <arch/cpu.h> +#include <arch/romstage.h> #include <bootblock_common.h> #include <bootmode.h> #include <cbmem.h> diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 94b9899422..9f02c8b1d3 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -14,6 +14,7 @@ */ #include <arch/cpu.h> +#include <arch/romstage.h> #include <cpu/x86/mtrr.h> #include <cbmem.h> #include <console/console.h> diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c index 53c51f488c..9c41486aa2 100644 --- a/src/soc/intel/denverton_ns/romstage.c +++ b/src/soc/intel/denverton_ns/romstage.c @@ -15,6 +15,7 @@ */ #include <arch/cpu.h> +#include <arch/romstage.h> #include <arch/io.h> #include <cbmem.h> #include <cf9_reset.h> diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c index 65e65cc80e..8312f178e4 100644 --- a/src/soc/intel/icelake/romstage/romstage.c +++ b/src/soc/intel/icelake/romstage/romstage.c @@ -14,6 +14,7 @@ */ #include <arch/cpu.h> +#include <arch/romstage.h> #include <cpu/x86/mtrr.h> #include <cbmem.h> #include <console/console.h> diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c index 20f2ad776b..0489621045 100644 --- a/src/soc/intel/quark/romstage/fsp2_0.c +++ b/src/soc/intel/quark/romstage/fsp2_0.c @@ -14,6 +14,7 @@ */ #include <arch/cpu.h> +#include <arch/romstage.h> #include <arch/symbols.h> #include <console/console.h> #include <cbmem.h> diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 221c6c41d5..8b5cd18195 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -14,6 +14,7 @@ */ #include <arch/cpu.h> +#include <arch/romstage.h> #include <arch/symbols.h> #include <assert.h> #include <cpu/x86/mtrr.h> |