diff options
| author | Martin Roth <martinroth@google.com> | 2016-01-31 10:39:47 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-02 01:44:56 +0100 |
| commit | b00ddecd993c4d327628a7327015cb90d80d1dbb (patch) | |
| tree | 4f8f7061678e7b9e5219238d657c4d33a8ca5365 /src/soc | |
| parent | 1010868f87db1e449a13833be4991cef9cf8b0fc (diff) | |
| download | coreboot-b00ddecd993c4d327628a7327015cb90d80d1dbb.tar.xz | |
Kconfig: indent with tabs, not spaces.
Change-Id: I8996f8ab739a07014a4189738b5624485d752d9d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13540
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 35b2a18ee6..0ebdaa4261 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -181,9 +181,9 @@ config DCACHE_RAM_SIZE_TOTAL default 0x40000 config SKIP_FSP_CAR - bool "Skip cache as RAM setup in FSP" - default y - help - Skip Cache as RAM setup in FSP. + bool "Skip cache as RAM setup in FSP" + default y + help + Skip Cache as RAM setup in FSP. endif |