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authorJagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>2016-03-04 14:00:04 -0800
committerMartin Roth <martinroth@google.com>2016-04-20 18:50:24 +0200
commitd68a13a602883d7e5a52ceb9062d71f363855695 (patch)
tree21fadbca01a248cdee791a5dafd38e3c6632d3b5 /src/soc
parent60c64325cc71db3911460c02097c6a180eca0ecd (diff)
downloadcoreboot-d68a13a602883d7e5a52ceb9062d71f363855695.tar.xz
soc/intel/apollolake: configure interrupt trigger mode
Provide trigger option to configure APIC, sci, smi, nmi interrupts. Change-Id: I1b553fb4ed1b43aba62346f5b758f8d082606510 Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/14353 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/apollolake/include/soc/gpio.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/intel/apollolake/include/soc/gpio.h b/src/soc/intel/apollolake/include/soc/gpio.h
index 9138ecbbdd..7a254752f4 100644
--- a/src/soc/intel/apollolake/include/soc/gpio.h
+++ b/src/soc/intel/apollolake/include/soc/gpio.h
@@ -53,28 +53,28 @@
PAD_PULL(pull))
/* General purpose input, routed to APIC */
-#define PAD_CFG_GPI_APIC(pad, pull, rst) \
+#define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \
- PAD_IRQ_CFG(IOAPIC, LEVEL, NONE), PAD_PULL(pull))
+ PAD_IRQ_CFG(IOAPIC, trig, inv), PAD_PULL(pull))
/* General purpose input, routed to SMI */
-#define PAD_CFG_GPI_SMI(pad, pull, rst, inv) \
+#define PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \
- PAD_IRQ_CFG(SMI, LEVEL, inv), PAD_PULL(pull))
+ PAD_IRQ_CFG(SMI, trig, inv), PAD_PULL(pull))
/* General purpose input, routed to SCI */
-#define PAD_CFG_GPI_SCI(pad, pull, rst, inv) \
+#define PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \
- PAD_IRQ_CFG(SCI, LEVEL, inv), PAD_PULL(pull))
+ PAD_IRQ_CFG(SCI, trig, inv), PAD_PULL(pull))
/* General purpose input, routed to NMI */
-#define PAD_CFG_GPI_NMI(pad, pull, rst, inv) \
+#define PAD_CFG_GPI_NMI(pad, pull, rst, trig, inv) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \
- PAD_IRQ_CFG(NMI, LEVEL, inv), PAD_PULL(pull))
+ PAD_IRQ_CFG(NMI, trig, inv), PAD_PULL(pull))
struct pad_config {
uint32_t config0;