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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-27 14:50:27 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-07-10 11:16:07 +0200 |
| commit | e5c00a5d2c71cc7689e783f26a6031997857d661 (patch) | |
| tree | bca1e3ede5790272720190ed0f77d4e6c571e7a8 /src/soc | |
| parent | 70cd54310b98f422b7d66a0e0932d53edec40bb7 (diff) | |
| download | coreboot-e5c00a5d2c71cc7689e783f26a6031997857d661.tar.xz | |
intel post-car: Consolidate choose_top_of_stack()
Change-Id: I2c49d68ea9a8f52737b6064bc4fa703bdb1af1df
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15463
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/baytrail/romstage/romstage.c | 16 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/romstage/stack.c | 17 |
2 files changed, 3 insertions, 30 deletions
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index a167c90530..d7e8b17648 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -258,20 +258,6 @@ static inline uint32_t *stack_push(u32 *stack, u32 value) return stack; } -/* Romstage needs quite a bit of stack for decompressing images since the lzma - * lib keeps its state on the stack during romstage. */ -static unsigned long choose_top_of_stack(void) -{ - unsigned long stack_top; - const unsigned long romstage_ram_stack_size = 0x5000; - - /* cbmem_add() does a find() before add(). */ - stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, - romstage_ram_stack_size); - stack_top += romstage_ram_stack_size; - return stack_top; -} - /* setup_stack_and_mttrs() determines the stack to use after * cache-as-ram is torn down as well as the MTRR settings to use. */ static void *setup_stack_and_mttrs(void) @@ -283,7 +269,7 @@ static void *setup_stack_and_mttrs(void) uint32_t top_of_ram; /* Top of stack needs to be aligned to a 4-byte boundary. */ - top_of_stack = choose_top_of_stack() & ~3; + top_of_stack = romstage_ram_stack_top() & ~3; slot = (void *)top_of_stack; num_mtrrs = 0; diff --git a/src/soc/intel/broadwell/romstage/stack.c b/src/soc/intel/broadwell/romstage/stack.c index 6c602a800d..76307cfbb5 100644 --- a/src/soc/intel/broadwell/romstage/stack.c +++ b/src/soc/intel/broadwell/romstage/stack.c @@ -21,6 +21,7 @@ #include <cbmem.h> #include <cpu/x86/mtrr.h> #include <soc/romstage.h> +#include <program_loading.h> static inline uint32_t *stack_push(u32 *stack, u32 value) { @@ -29,20 +30,6 @@ static inline uint32_t *stack_push(u32 *stack, u32 value) return stack; } -/* Romstage needs quite a bit of stack for decompressing images since the lzma - * lib keeps its state on the stack during romstage. */ -static unsigned long choose_top_of_stack(void) -{ - unsigned long stack_top; - const unsigned long romstage_ram_stack_size = 0x5000; - - /* cbmem_add() does a find() before add(). */ - stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, - romstage_ram_stack_size); - stack_top += romstage_ram_stack_size; - return stack_top; -} - /* setup_stack_and_mttrs() determines the stack to use after * cache-as-ram is torn down as well as the MTRR settings to use. */ void *setup_stack_and_mttrs(void) @@ -54,7 +41,7 @@ void *setup_stack_and_mttrs(void) uint32_t top_of_ram; /* Top of stack needs to be aligned to a 4-byte boundary. */ - top_of_stack = choose_top_of_stack() & ~3; + top_of_stack = romstage_ram_stack_top() & ~3; slot = (void *)top_of_stack; num_mtrrs = 0; |