3rdparty: Move to blobs

To move 3rdparty to 3rdparty/blobs (ie. below itself
from git's broken perspective), we need to work around
it - since some git implementations don't like the direct
approach.

Change-Id: I1fc84bbb37e7c8c91ab14703d609a739b5ca073c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10108
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

9 files changed, 14 insertions, 14 deletions

diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 0b3e1763f4..13f60bdbd1 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -75,7 +75,7 @@ if HAVE_MRC
 
 config MRC_FILE
 	string "Intel memory refeference code path and filename"
-	default "3rdparty/northbridge/intel/sandybridge/systemagent-r6.bin"
+	default "blobs/northbridge/intel/sandybridge/systemagent-r6.bin"
 	help
 	  The path and filename of the file to use as System Agent
 	  binary. Note that this points to the sandybridge binary file
@@ -174,7 +174,7 @@ config HAVE_ME_BIN
 	help
 	  The Intel processor in the selected system requires a special firmware
 	  for an integrated controller called Management Engine (ME). The ME
-	  firmware might be provided in coreboot's 3rdparty repository. If
+	  firmware might be provided in coreboot's blobs repository. If
 	  not and if you don't have the firmware elsewhere, you can still
 	  build coreboot without it. In this case however, you'll have to make
 	  sure that you don't overwrite your ME firmware on your flash ROM.
@@ -182,7 +182,7 @@ config HAVE_ME_BIN
 config ME_BIN_PATH
 	string "Path to management engine firmware"
 	depends on HAVE_ME_BIN
-	default "3rdparty/mainboard/$(MAINBOARDDIR)/me.bin"
+	default "blobs/mainboard/$(MAINBOARDDIR)/me.bin"
 
 config HAVE_IFD_BIN
 	bool
@@ -223,7 +223,7 @@ config IFD_PLATFORM_SECTION
 config IFD_BIN_PATH
 	string "Path to intel firmware descriptor"
 	depends on !BUILD_WITH_FAKE_IFD
-	default "3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin"
+	default "blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin"
 
 config HAVE_REFCODE_BLOB
 	depends on ARCH_X86
diff --git a/src/soc/intel/baytrail/microcode/microcode_blob.c b/src/soc/intel/baytrail/microcode/microcode_blob.c
index 7c7b6f10b6..a651f978fd 100644
--- a/src/soc/intel/baytrail/microcode/microcode_blob.c
+++ b/src/soc/intel/baytrail/microcode/microcode_blob.c
@@ -1,3 +1,3 @@
 unsigned microcode[] = {
-#include "../../../../../3rdparty/soc/intel/baytrail/microcode_blob.h"
+#include "../../../../../blobs/soc/intel/baytrail/microcode_blob.h"
 };
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 6cec3dba4c..d3c7ff6594 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -211,7 +211,7 @@ config HAVE_ME_BIN
 	help
 	  The Intel processor in the selected system requires a special firmware
 	  for an integrated controller called Management Engine (ME). The ME
-	  firmware might be provided in coreboot's 3rdparty repository. If
+	  firmware might be provided in coreboot's blobs repository. If
 	  not and if you don't have the firmware elsewhere, you can still
 	  build coreboot without it. In this case however, you'll have to make
 	  sure that you don't overwrite your ME firmware on your flash ROM.
@@ -219,7 +219,7 @@ config HAVE_ME_BIN
 config ME_BIN_PATH
 	string "Path to management engine firmware"
 	depends on HAVE_ME_BIN
-	default "3rdparty/mainboard/$(MAINBOARDDIR)/me.bin"
+	default "blobs/mainboard/$(MAINBOARDDIR)/me.bin"
 
 config HAVE_IFD_BIN
 	bool "Use Intel Firmware Descriptor from existing binary"
@@ -260,7 +260,7 @@ config IFD_PLATFORM_SECTION
 config IFD_BIN_PATH
 	string "Path to intel firmware descriptor"
 	depends on !BUILD_WITH_FAKE_IFD
-	default "3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin"
+	default "blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin"
 
 config LOCK_MANAGEMENT_ENGINE
 	bool "Lock Management Engine section"
diff --git a/src/soc/intel/broadwell/microcode/microcode_blob.c b/src/soc/intel/broadwell/microcode/microcode_blob.c
index cd7fad606c..93a6aa86e4 100644
--- a/src/soc/intel/broadwell/microcode/microcode_blob.c
+++ b/src/soc/intel/broadwell/microcode/microcode_blob.c
@@ -18,6 +18,6 @@
  */
 
 unsigned microcode[] = {
-#include "../../../../../3rdparty/soc/intel/broadwell/microcode_blob.h"
+#include "../../../../../blobs/soc/intel/broadwell/microcode_blob.h"
 };
 
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index fc321025d9..af8f61751d 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -49,7 +49,7 @@ config MAX_CPUS
 
 config MTS_DIRECTORY
 	string "Directory where MTS microcode files are located"
-	default "3rdparty/cpu/nvidia/tegra132/current/prod"
+	default "blobs/cpu/nvidia/tegra132/current/prod"
 	help
 	  Path to directory where MTS microcode files are located.
 
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index 5c03d52573..c1c66bb8c2 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -30,7 +30,7 @@ config MBN_ENCAPSULATION
 config SBL_BLOB
 	depends on USE_BLOBS
 	string "file name of the Qualcomm SBL blob"
-	default "3rdparty/cpu/qualcomm/ipq806x/uber-sbl.mbn"
+	default "blobs/cpu/qualcomm/ipq806x/uber-sbl.mbn"
 	help
 	  The path and filename of the binary blob containing
 	  ipq806x early initialization code, as supplied by the
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index 8cf8d7aa56..f3b0b200a2 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -83,7 +83,7 @@ CPPFLAGS_common += -Isrc/soc/qualcomm/ipq806x/include
 mbn-files := cdt.mbn  ddr.mbn  rpm.mbn tz.mbn
 
 # Location of the binary blobs
-mbn-root := 3rdparty/cpu/qualcomm/ipq806x
+mbn-root := blobs/cpu/qualcomm/ipq806x
 
 # Create make variables to aid cbfs-files-handler in processing the blobs (add
 # them all as raw binaries at the root level).
diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc
index 1cde349502..c09ecb4081 100644
--- a/src/soc/samsung/exynos5250/Makefile.inc
+++ b/src/soc/samsung/exynos5250/Makefile.inc
@@ -52,6 +52,6 @@ $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
 $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
 	@printf "    BL1, CKSUM $(subst $(obj)/,,$(@))\n"
 	util/exynos/fixed_cksum.py $< $<.cksum 32768
-	cat 3rdparty/cpu/samsung/exynos5250/bl1.bin $<.cksum > $@
+	cat blobs/cpu/samsung/exynos5250/bl1.bin $<.cksum > $@
 
 endif
diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc
index e42fc9aebf..8d90ba07ce 100644
--- a/src/soc/samsung/exynos5420/Makefile.inc
+++ b/src/soc/samsung/exynos5420/Makefile.inc
@@ -54,6 +54,6 @@ $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
 $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
 	@printf "    BL1, CKSUM $(subst $(obj)/,,$(@))\n"
 	util/exynos/variable_cksum.py $< $<.cksum
-	cat 3rdparty/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@
+	cat blobs/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@
 
 endif