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authorJohanna Schander <coreboot@mimoja.de>2019-12-08 11:04:09 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-02-11 09:09:39 +0000
commitf538d74e9cf27d3353b3c1d56cb5be42c207ad84 (patch)
tree9b17ff6a4eb309c1f7ffbeba626c2ee598723e9b /src/soc
parent75f0124c44a26aa2d71bb3cba7cdc42e224980ce (diff)
downloadcoreboot-f538d74e9cf27d3353b3c1d56cb5be42c207ad84.tar.xz
vendorcode/intel: Remove Ice Lake FSP Bindings
By updating the FSP submodule we now got all FSP headers from within that repo. This commit changes the default paths to use these and fixes some include paths to allow the usage of vendorcode/intel/edk2/UDK2017 together with the official Intel distribution. We are also adding back the CHANNEL_PRESENT enum, that is missing in the official headers. This was tested on the Razer Blade Stealth (late 2019). Change-Id: I7d5520dcd30f4a68af325125052e16e867e91ec9 Signed-off-by: Johanna Schander <coreboot@mimoja.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37579 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Christoph Pomaska <github@slrie.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/icelake/Kconfig2
-rw-r--r--src/soc/intel/icelake/romstage/romstage.c7
2 files changed, 8 insertions, 1 deletions
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 15e895fa1d..42e86c73b2 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -180,7 +180,7 @@ config CBFS_SIZE
config FSP_HEADER_PATH
string "Location of FSP headers"
- default "src/vendorcode/intel/fsp/fsp2_0/icelake/"
+ default "3rdparty/fsp/IceLakeFspBinPkg/Include"
config FSP_FD_PATH
string
diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c
index 7f1be731e8..37fc678cd9 100644
--- a/src/soc/intel/icelake/romstage/romstage.c
+++ b/src/soc/intel/icelake/romstage/romstage.c
@@ -35,6 +35,13 @@
0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \
}
+/* Memory Channel Present Status */
+enum {
+ CHANNEL_NOT_PRESENT,
+ CHANNEL_DISABLED,
+ CHANNEL_PRESENT
+};
+
/* Save the DIMM information for SMBIOS table 17 */
static void save_dimm_info(void)
{