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authorAaron Durbin <adurbin@chromium.org>2017-05-22 16:28:46 -0500
committerFurquan Shaikh <furquan@google.com>2017-05-24 00:28:22 +0200
commit250715eb2ff15503710a7d2187688a7db1b4d22f (patch)
tree74c2372ee0945db0af228eff3332c9e9fd22be4f /src/soc
parent0fb6568444328ec62e9585d827c77fd8ecc66cd3 (diff)
downloadcoreboot-250715eb2ff15503710a7d2187688a7db1b4d22f.tar.xz
soc/marvell/bg4cd: remove cosmos mainboard and bg4cd soc
The SoC code was never completed. It's just a skeleton that gets in the way of refactoring other code. Likewise, the mainboard was never completed either. Just remove them both. Change-Id: I8faaa9bb1b90ad2936dcdbaf2882651ebba6630c Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19823 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/marvell/bg4cd/Kconfig34
-rw-r--r--src/soc/marvell/bg4cd/Makefile.inc49
-rw-r--r--src/soc/marvell/bg4cd/bootblock.c26
-rw-r--r--src/soc/marvell/bg4cd/bootblock_asm.S54
-rw-r--r--src/soc/marvell/bg4cd/cbmem.c22
-rw-r--r--src/soc/marvell/bg4cd/i2c.c26
-rw-r--r--src/soc/marvell/bg4cd/include/soc/gpio.h21
-rw-r--r--src/soc/marvell/bg4cd/include/soc/i2c.h21
-rw-r--r--src/soc/marvell/bg4cd/include/soc/memlayout.ld40
-rw-r--r--src/soc/marvell/bg4cd/include/soc/sdram.h20
-rw-r--r--src/soc/marvell/bg4cd/monotonic_timer.c21
-rw-r--r--src/soc/marvell/bg4cd/romstage.S79
-rw-r--r--src/soc/marvell/bg4cd/sdram.c22
-rw-r--r--src/soc/marvell/bg4cd/spi.c21
14 files changed, 0 insertions, 456 deletions
diff --git a/src/soc/marvell/bg4cd/Kconfig b/src/soc/marvell/bg4cd/Kconfig
deleted file mode 100644
index 6f9b6aab32..0000000000
--- a/src/soc/marvell/bg4cd/Kconfig
+++ /dev/null
@@ -1,34 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright 2014 Google Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SOC_MARVELL_BG4CD
- bool
- default n
- select ARCH_BOOTBLOCK_ARMV7_M
- select BOOTBLOCK_CUSTOM if VBOOT
- select ARCH_RAMSTAGE_ARMV7
- select ARCH_ROMSTAGE_ARMV7
- select ARCH_VERSTAGE_ARMV7_M
- select BOOTBLOCK_CONSOLE
- select GENERIC_UDELAY
- select HAVE_MONOTONIC_TIMER
- select GENERIC_GPIO_LIB
-
-if SOC_MARVELL_BG4CD
-
-config VBOOT
- select VBOOT_STARTS_IN_BOOTBLOCK
-
-endif
diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc
deleted file mode 100644
index 86aa764f89..0000000000
--- a/src/soc/marvell/bg4cd/Makefile.inc
+++ /dev/null
@@ -1,49 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright 2014 Google Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-ifeq ($(CONFIG_SOC_MARVELL_BG4CD),y)
-
-bootblock-$(CONFIG_VBOOT) += bootblock_asm.S
-bootblock-$(CONFIG_VBOOT) += bootblock.c
-
-bootblock-y += cbmem.c
-bootblock-y += i2c.c
-bootblock-y += monotonic_timer.c
-bootblock-$(CONFIG_SPI_FLASH) += spi.c
-
-verstage-y += i2c.c
-verstage-y += monotonic_timer.c
-verstage-$(CONFIG_SPI_FLASH) += spi.c
-
-romstage-y += romstage.S
-romstage-y += cbmem.c
-romstage-y += i2c.c
-romstage-y += monotonic_timer.c
-romstage-y += sdram.c
-romstage-$(CONFIG_SPI_FLASH) += spi.c
-
-ramstage-y += cbmem.c
-ramstage-y += i2c.c
-ramstage-y += monotonic_timer.c
-ramstage-$(CONFIG_SPI_FLASH) += spi.c
-
-CPPFLAGS_common += -Isrc/soc/marvell/bg4cd/include/
-
-$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
- @printf "Generating: $(subst $(obj)/,,$(@))\n"
- @mkdir -p $(dir $@)
- @mv $< $@
-
-endif
diff --git a/src/soc/marvell/bg4cd/bootblock.c b/src/soc/marvell/bg4cd/bootblock.c
deleted file mode 100644
index fb3dcd2248..0000000000
--- a/src/soc/marvell/bg4cd/bootblock.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <program_loading.h>
-#include <timestamp.h>
-#include <vendorcode/google/chromeos/chromeos.h>
-
-void main(void)
-{
- console_init();
- timestamp_init(timestamp_get());
- run_romstage();
-}
diff --git a/src/soc/marvell/bg4cd/bootblock_asm.S b/src/soc/marvell/bg4cd/bootblock_asm.S
deleted file mode 100644
index 73ca46b278..0000000000
--- a/src/soc/marvell/bg4cd/bootblock_asm.S
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <arch/asm.h>
-
-ENTRY(_start)
- /*
- * Initialize the stack to a known value. This is used to check for
- * stack overflow later in the boot process.
- */
- ldr r0, =_stack
- ldr r1, =_estack
- ldr r2, =0xdeadbeef
-init_stack_loop:
- str r2, [r0]
- add r0, #4
- cmp r0, r1
- bne init_stack_loop
-
-call_verstage:
- ldr sp, =_estack /* Set up stack pointer */
- /*
- * we don't bl here to preserve lr so that we can return to the caller
- * of the bootblock
- */
- b main
-ENDPROC(_start)
diff --git a/src/soc/marvell/bg4cd/cbmem.c b/src/soc/marvell/bg4cd/cbmem.c
deleted file mode 100644
index ee8cd16f32..0000000000
--- a/src/soc/marvell/bg4cd/cbmem.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <cbmem.h>
-#include <stddef.h>
-
-void *cbmem_top(void)
-{
- return NULL;
-}
diff --git a/src/soc/marvell/bg4cd/i2c.c b/src/soc/marvell/bg4cd/i2c.c
deleted file mode 100644
index 6d06ee3089..0000000000
--- a/src/soc/marvell/bg4cd/i2c.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/i2c.h>
-#include <soc/i2c.h>
-
-int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count)
-{
- return 0;
-}
-
-void i2c_init(unsigned int bus, unsigned int hz)
-{
-}
diff --git a/src/soc/marvell/bg4cd/include/soc/gpio.h b/src/soc/marvell/bg4cd/include/soc/gpio.h
deleted file mode 100644
index de1224ff72..0000000000
--- a/src/soc/marvell/bg4cd/include/soc/gpio.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __SOC_MARVELL_BG4CD_GPIO_H__
-#define __SOC_MARVELL_BG4CD_GPIO_H__
-
-#include <types.h>
-
-typedef u32 gpio_t;
-
-#endif /* __SOC_MARVELL_BG4CD_GPIO_H__ */
diff --git a/src/soc/marvell/bg4cd/include/soc/i2c.h b/src/soc/marvell/bg4cd/include/soc/i2c.h
deleted file mode 100644
index e6244ea86d..0000000000
--- a/src/soc/marvell/bg4cd/include/soc/i2c.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __SOC_MARVELL_BG4CD_I2C_H__
-#define __SOC_MARVELL_BG4CD_I2C_H__
-
-void i2c_init(unsigned int bus, unsigned int hz);
-
-#endif
diff --git a/src/soc/marvell/bg4cd/include/soc/memlayout.ld b/src/soc/marvell/bg4cd/include/soc/memlayout.ld
deleted file mode 100644
index 83d9bf09a3..0000000000
--- a/src/soc/marvell/bg4cd/include/soc/memlayout.ld
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <memlayout.h>
-
-#include <arch/header.ld>
-
-SECTIONS
-{
- SRAM_START(0x20000)
-
- BOOTBLOCK(0x20000, 40K)
- /* there is no VERSTAGE because it's built into bootblock */
-
- PRERAM_CBFS_CACHE(0x2A000, 8K)
- STACK(0x2C000, 8K)
- VBOOT2_WORK(0x2E000, 16K)
-
- SRAM_END(0x40000)
-
- DRAM_START(0x40000)
-
- RAMSTAGE(0x40000, 128K)
- POSTRAM_CBFS_CACHE(0x60000, 1M)
-
- ROMSTAGE(0xF7A40000, 32K)
- TTB(0xF7A48000, 16K)
-}
diff --git a/src/soc/marvell/bg4cd/include/soc/sdram.h b/src/soc/marvell/bg4cd/include/soc/sdram.h
deleted file mode 100644
index 09805601c6..0000000000
--- a/src/soc/marvell/bg4cd/include/soc/sdram.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __SOC_MARVELL_BG4CD_SDRAM_H__
-#define __SOC_MARVELL_BG4CD_SDRAM_H__
-
-void sdram_init(void);
-#endif
diff --git a/src/soc/marvell/bg4cd/monotonic_timer.c b/src/soc/marvell/bg4cd/monotonic_timer.c
deleted file mode 100644
index e8e59393b5..0000000000
--- a/src/soc/marvell/bg4cd/monotonic_timer.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <delay.h>
-#include <timer.h>
-
-void timer_monotonic_get(struct mono_time *mt)
-{
-}
diff --git a/src/soc/marvell/bg4cd/romstage.S b/src/soc/marvell/bg4cd/romstage.S
deleted file mode 100644
index 73574f2bc4..0000000000
--- a/src/soc/marvell/bg4cd/romstage.S
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <arch/asm.h>
-
-.arm
-ENTRY(stage_entry)
- /*
- * Set the CPU to System mode with IRQ and FIQ disabled. Prefetch/Data
- * aborts may happen early and crash before the abort handlers are
- * installed, but at least the problem will show up near the code that
- * causes it.
- */
- msr cpsr_cxf, #0xdf
- bl _thumb_start
-ENDPROC(stage_entry)
-
-.thumb
-ENTRY(_thumb_start)
- bl arm_init_caches
-
- /*
- * From Cortex-A Series Programmer's Guide:
- * Only CPU 0 performs initialization. Other CPUs go into WFI
- * to do this, first work out which CPU this is
- * this code typically is run before any other initialization step
- */
- mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register
- and r1, r1, #0x3 @ Extract CPU ID bits
- cmp r1, #0
- bne wait_for_interrupt @ If this is not core0, wait
-
- /*
- * Initialize the stack to a known value. This is used to check for
- * stack overflow later in the boot process.
- */
- ldr r0, =_stack
- ldr r1, =_estack
- ldr r2, =0xdeadbeef
-init_stack_loop:
- str r2, [r0]
- add r0, #4
- cmp r0, r1
- bne init_stack_loop
-
- ldr sp, =_estack /* Set up stack pointer */
- bl main
-
-wait_for_interrupt:
- wfi
- mov pc, lr @ back to my caller
-ENDPROC(_thumb_start)
diff --git a/src/soc/marvell/bg4cd/sdram.c b/src/soc/marvell/bg4cd/sdram.c
deleted file mode 100644
index 74c239644d..0000000000
--- a/src/soc/marvell/bg4cd/sdram.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <console/console.h>
-#include <soc/sdram.h>
-
-void sdram_init(void)
-{
- printk(BIOS_INFO, "Starting SDRAM initialization...\n");
- printk(BIOS_INFO, "Finish SDRAM initialization...\n");
-}
diff --git a/src/soc/marvell/bg4cd/spi.c b/src/soc/marvell/bg4cd/spi.c
deleted file mode 100644
index 188a6bd483..0000000000
--- a/src/soc/marvell/bg4cd/spi.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stddef.h>
-#include <spi-generic.h>
-
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- return -1;
-}