soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices

Since PIRQ->IRQ mapping registers PxRC are not available after FSP-S call
due to PCH requirement change from CNP PCH onwards, hence making static IRQ
mapping for pci_irqs.asl and pcie.asl

Also remove unused irqlinks.asl from soc/intel/cannonlake/acpi/

Change-Id: I35e2ed150a1db195fc9ce13897e65b23fc8b7ca1
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/29628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

4 files changed, 51 insertions, 332 deletions

diff --git a/src/soc/intel/cannonlake/acpi/irqlinks.asl b/src/soc/intel/cannonlake/acpi/irqlinks.asl
deleted file mode 100644
index 0403ea06f3..0000000000
--- a/src/soc/intel/cannonlake/acpi/irqlinks.asl
+++ /dev/null
@@ -1,282 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2018 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/*
- * PIRQ routing control is in PCR ITSS region.
- *
- * Due to what appears to be an ACPI interpreter bug we do not use
- * the PCRB() method here as it may not be defined yet because the method
- * definiton depends on the order of the include files in pch.asl.
- *
- * https://bugs.acpica.org/show_bug.cgi?id=1201
- */
-OperationRegion (ITSS, SystemMemory,
-		 Add (PCR_ITSS_PIRQA_ROUT,
-		      Add (CONFIG_PCR_BASE_ADDRESS,
-		           ShiftLeft (PID_ITSS, PCR_PORTID_SHIFT))), 8)
-Field (ITSS, ByteAcc, NoLock, Preserve)
-{
-	PIRA, 8,	/* PIRQA Routing Control */
-	PIRB, 8,	/* PIRQB Routing Control */
-	PIRC, 8,	/* PIRQC Routing Control */
-	PIRD, 8,	/* PIRQD Routing Control */
-	PIRE, 8,	/* PIRQE Routing Control */
-	PIRF, 8,	/* PIRQF Routing Control */
-	PIRG, 8,	/* PIRQG Routing Control */
-	PIRH, 8,	/* PIRQH Routing Control */
-}
-
-Name (IREN, 0x80)	/* Interrupt Routing Enable */
-Name (IREM, 0x0f)	/* Interrupt Routing Mask */
-
-Device (LNKA)
-{
-	Name (_HID, EISAID ("PNP0C0F"))
-	Name (_UID, 1)
-
-	Method (_CRS, 0, Serialized)
-	{
-		Name (RTLA, ResourceTemplate ()
-		{
-			IRQ (Level, ActiveLow, Shared) {11}
-		})
-		CreateWordField (RTLA, 1, IRQ0)
-		Store (Zero, IRQ0)
-
-		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRA, ^^IREM), IRQ0)
-
-		Return (RTLA)
-	}
-
-	Method (_STA, 0, Serialized)
-	{
-		If (And (^^PIRA, ^^IREN)) {
-			Return (0x9)
-		} Else {
-			Return (0xb)
-		}
-	}
-}
-
-Device (LNKB)
-{
-	Name (_HID, EISAID ("PNP0C0F"))
-	Name (_UID, 2)
-
-	Method (_CRS, 0, Serialized)
-	{
-		Name (RTLB, ResourceTemplate ()
-		{
-			IRQ (Level, ActiveLow, Shared) {10}
-		})
-		CreateWordField (RTLB, 1, IRQ0)
-		Store (Zero, IRQ0)
-
-		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRB, ^^IREM), IRQ0)
-
-		Return (RTLB)
-	}
-
-	Method (_STA, 0, Serialized)
-	{
-		If (And (^^PIRB, ^^IREN)) {
-			Return (0x9)
-		} Else {
-			Return (0xb)
-		}
-	}
-}
-
-Device (LNKC)
-{
-	Name (_HID, EISAID ("PNP0C0F"))
-	Name (_UID, 3)
-
-	Method (_CRS, 0, Serialized)
-	{
-		Name (RTLC, ResourceTemplate ()
-		{
-			IRQ (Level, ActiveLow, Shared) {11}
-		})
-		CreateWordField (RTLC, 1, IRQ0)
-		Store (Zero, IRQ0)
-
-		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRC, ^^IREM), IRQ0)
-
-		Return (RTLC)
-	}
-
-	Method (_STA, 0, Serialized)
-	{
-		If (And (^^PIRC, ^^IREN)) {
-			Return (0x9)
-		} Else {
-			Return (0xb)
-		}
-	}
-}
-
-Device (LNKD)
-{
-	Name (_HID, EISAID ("PNP0C0F"))
-	Name (_UID, 4)
-
-	Method (_CRS, 0, Serialized)
-	{
-		Name (RTLD, ResourceTemplate ()
-		{
-			IRQ (Level, ActiveLow, Shared) {11}
-		})
-		CreateWordField (RTLD, 1, IRQ0)
-		Store (Zero, IRQ0)
-
-		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRD, ^^IREM), IRQ0)
-
-		Return (RTLD)
-	}
-
-	Method (_STA, 0, Serialized)
-	{
-		If (And (^^PIRD, ^^IREN)) {
-			Return (0x9)
-		} Else {
-			Return (0xb)
-		}
-	}
-}
-
-Device (LNKE)
-{
-	Name (_HID, EISAID ("PNP0C0F"))
-	Name (_UID, 5)
-
-	Method (_CRS, 0, Serialized)
-	{
-		Name (RTLE, ResourceTemplate ()
-		{
-			IRQ (Level, ActiveLow, Shared) {11}
-		})
-		CreateWordField (RTLE, 1, IRQ0)
-		Store (Zero, IRQ0)
-
-		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRE, ^^IREM), IRQ0)
-
-		Return (RTLE)
-	}
-
-	Method (_STA, 0, Serialized)
-	{
-		If (And (^^PIRE, ^^IREN)) {
-			Return (0x9)
-		} Else {
-			Return (0xb)
-		}
-	}
-}
-
-Device (LNKF)
-{
-	Name (_HID, EISAID ("PNP0C0F"))
-	Name (_UID, 6)
-
-	Method (_CRS, 0, Serialized)
-	{
-		Name (RTLF, ResourceTemplate ()
-		{
-			IRQ (Level, ActiveLow, Shared) {11}
-		})
-		CreateWordField (RTLF, 1, IRQ0)
-		Store (Zero, IRQ0)
-
-		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRF, ^^IREM), IRQ0)
-
-		Return (RTLF)
-	}
-
-	Method (_STA, 0, Serialized)
-	{
-		If (And (^^PIRF, ^^IREN)) {
-			Return (0x9)
-		} Else {
-			Return (0xb)
-		}
-	}
-}
-
-Device (LNKG)
-{
-	Name (_HID, EISAID ("PNP0C0F"))
-	Name (_UID, 7)
-
-	Method (_CRS, 0, Serialized)
-	{
-		Name (RTLG, ResourceTemplate ()
-		{
-			IRQ (Level, ActiveLow, Shared) {11}
-		})
-		CreateWordField (RTLG, 1, IRQ0)
-		Store (Zero, IRQ0)
-
-		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRG, ^^IREM), IRQ0)
-
-		Return (RTLG)
-	}
-
-	Method (_STA, 0, Serialized)
-	{
-		If (And (^^PIRG, ^^IREN)) {
-			Return (0x9)
-		} Else {
-			Return (0xb)
-		}
-	}
-}
-
-Device (LNKH)
-{
-	Name (_HID, EISAID ("PNP0C0F"))
-	Name (_UID, 8)
-
-	Method (_CRS, 0, Serialized)
-	{
-		Name (RTLH, ResourceTemplate ()
-		{
-			IRQ (Level, ActiveLow, Shared) {11}
-		})
-		CreateWordField (RTLH, 1, IRQ0)
-		Store (Zero, IRQ0)
-
-		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRH, ^^IREM), IRQ0)
-
-		Return (RTLH)
-	}
-
-	Method (_STA, 0, Serialized)
-	{
-		If (And (^^PIRH, ^^IREN)) {
-			Return (0x9)
-		} Else {
-			Return (0xb)
-		}
-	}
-}
diff --git a/src/soc/intel/cannonlake/acpi/pci_irqs.asl b/src/soc/intel/cannonlake/acpi/pci_irqs.asl
index d346ce2269..accfdb93e2 100644
--- a/src/soc/intel/cannonlake/acpi/pci_irqs.asl
+++ b/src/soc/intel/cannonlake/acpi/pci_irqs.asl
@@ -83,52 +83,56 @@ Name (PICP, Package () {
 })
 
 Name (PICN, Package () {
+	/*
+	 * If the setting change in soc_pch_pirq_init(), then
+	 * please make the same static IRQ changes here as well.
+	 */
 	/* D31: cAVS, SMBus, GbE, Nothpeak */
-	Package () { 0x001FFFFF, 0, \_SB.PCI0.LNKA, 0 },
-	Package () { 0x001FFFFF, 1, \_SB.PCI0.LNKB, 0 },
-	Package () { 0x001FFFFF, 2, \_SB.PCI0.LNKC, 0 },
-	Package () { 0x001FFFFF, 3, \_SB.PCI0.LNKD, 0 },
-	/* D32: Can't use PIC*/
+	Package () { 0x001FFFFF, 0, 0, 11 },
+	Package () { 0x001FFFFF, 1, 0, 10 },
+	Package () { 0x001FFFFF, 2, 0, 11 },
+	Package () { 0x001FFFFF, 3, 0, 11 },
+	/* D30: Can't use PIC*/
 	/* D29: PCI Express Port 9-16 */
-	Package () { 0x001DFFFF, 0, \_SB.PCI0.LNKA, 0 },
-	Package () { 0x001DFFFF, 1, \_SB.PCI0.LNKB, 0 },
-	Package () { 0x001DFFFF, 2, \_SB.PCI0.LNKC, 0 },
-	Package () { 0x001DFFFF, 3, \_SB.PCI0.LNKD, 0 },
+	Package () { 0x001DFFFF, 0, 0, 11 },
+	Package () { 0x001DFFFF, 1, 0, 10 },
+	Package () { 0x001DFFFF, 2, 0, 11 },
+	Package () { 0x001DFFFF, 3, 0, 11 },
 	/* D28: PCI Express Port 1-8 */
-	Package () { 0x001CFFFF, 0, \_SB.PCI0.LNKA, 0 },
-	Package () { 0x001CFFFF, 1, \_SB.PCI0.LNKB, 0 },
-	Package () { 0x001CFFFF, 2, \_SB.PCI0.LNKC, 0 },
-	Package () { 0x001CFFFF, 3, \_SB.PCI0.LNKD, 0 },
+	Package () { 0x001CFFFF, 0, 0, 11 },
+	Package () { 0x001CFFFF, 1, 0, 10 },
+	Package () { 0x001CFFFF, 2, 0, 11 },
+	Package () { 0x001CFFFF, 3, 0, 11 },
 	/* D25: Can't use PIC*/
 	/* D23 */
-	Package () { 0x0017FFFF, 0, \_SB.PCI0.LNKA, 0 },
+	Package () { 0x0017FFFF, 0, 0, 11 },
 	/* D22: CSME (HECI, IDE-R, KT redirection */
-	Package () { 0x0016FFFF, 0, \_SB.PCI0.LNKA, 0 },
-	Package () { 0x0016FFFF, 1, \_SB.PCI0.LNKB, 0 },
-	Package () { 0x0016FFFF, 2, \_SB.PCI0.LNKC, 0 },
-	Package () { 0x0016FFFF, 3, \_SB.PCI0.LNKD, 0 },
+	Package () { 0x0016FFFF, 0, 0, 11 },
+	Package () { 0x0016FFFF, 1, 0, 10 },
+	Package () { 0x0016FFFF, 2, 0, 11 },
+	Package () { 0x0016FFFF, 3, 0, 11 },
 	/* D21: Can't use PIC*/
 	/* D20: xHCI, OTG, SRAM, CNVi WiFi */
-	Package () { 0x0014FFFF, 0, \_SB.PCI0.LNKA, 0 },
-	Package () { 0x0014FFFF, 1, \_SB.PCI0.LNKB, 0 },
-	Package () { 0x0014FFFF, 2, \_SB.PCI0.LNKC, 0 },
-	Package () { 0x0014FFFF, 3, \_SB.PCI0.LNKD, 0 },
+	Package () { 0x0014FFFF, 0, 0, 11 },
+	Package () { 0x0014FFFF, 1, 0, 10 },
+	Package () { 0x0014FFFF, 2, 0, 11 },
+	Package () { 0x0014FFFF, 3, 0, 11 },
 	/* D19: Can't use PIC*/
 	/* Thermal */
-	Package () { 0x0012FFFF, 0, \_SB.PCI0.LNKA, 0 },
+	Package () { 0x0012FFFF, 0, 0, 11 },
 	/* P.E.G. Root Port D1F0 */
-	Package () { 0x0001FFFF, 0, \_SB.PCI0.LNKA, 0 },
-	Package () { 0x0001FFFF, 1, \_SB.PCI0.LNKB, 0 },
-	Package () { 0x0001FFFF, 2, \_SB.PCI0.LNKC, 0 },
-	Package () { 0x0001FFFF, 3, \_SB.PCI0.LNKD, 0 },
+	Package () { 0x0001FFFF, 0, 0, 11 },
+	Package () { 0x0001FFFF, 1, 0, 10 },
+	Package () { 0x0001FFFF, 2, 0, 11 },
+	Package () { 0x0001FFFF, 3, 0, 11 },
 	/* SA IGFX Device */
-	Package () { 0x0002FFFF, 0, \_SB.PCI0.LNKA, 0 },
+	Package () { 0x0002FFFF, 0, 0, 11 },
 	/* SA Thermal Device */
-	Package () { 0x0004FFFF, 0, \_SB.PCI0.LNKA, 0 },
+	Package () { 0x0004FFFF, 0, 0, 11 },
 	/* SA IPU Device */
-	Package () { 0x0005FFFF, 0, \_SB.PCI0.LNKA, 0 },
+	Package () { 0x0005FFFF, 0, 0, 11 },
 	/* SA GNA Device */
-	Package () { 0x0008FFFF, 0, \_SB.PCI0.LNKA, 0 },
+	Package () { 0x0008FFFF, 0, 0, 11 },
 })
 
 Method (_PRT)
diff --git a/src/soc/intel/cannonlake/acpi/pcie.asl b/src/soc/intel/cannonlake/acpi/pcie.asl
index 69e16ca075..9d4a65c639 100644
--- a/src/soc/intel/cannonlake/acpi/pcie.asl
+++ b/src/soc/intel/cannonlake/acpi/pcie.asl
@@ -24,10 +24,10 @@ Method (IRQM, 1, Serialized) {
 		Package () { 0x0000ffff, 2, 0, 18 },
 		Package () { 0x0000ffff, 3, 0, 19 } })
 	Name (IQAP, Package () {
-		Package () { 0x0000ffff, 0, \_SB.PCI0.LNKA, 0 },
-		Package () { 0x0000ffff, 1, \_SB.PCI0.LNKB, 0 },
-		Package () { 0x0000ffff, 2, \_SB.PCI0.LNKC, 0 },
-		Package () { 0x0000ffff, 3, \_SB.PCI0.LNKD, 0 } })
+		Package () { 0x0000ffff, 0, 0, 11 },
+		Package () { 0x0000ffff, 1, 0, 10 },
+		Package () { 0x0000ffff, 2, 0, 11 },
+		Package () { 0x0000ffff, 3, 0, 11 } })
 
 	/* Interrupt Map INTA->INTB, INTB->INTC, INTC->INTD, INTD->INTA */
 	Name (IQBA, Package () {
@@ -36,10 +36,10 @@ Method (IRQM, 1, Serialized) {
 		Package () { 0x0000ffff, 2, 0, 19 },
 		Package () { 0x0000ffff, 3, 0, 16 } })
 	Name (IQBP, Package () {
-		Package () { 0x0000ffff, 0, \_SB.PCI0.LNKB, 0 },
-		Package () { 0x0000ffff, 1, \_SB.PCI0.LNKC, 0 },
-		Package () { 0x0000ffff, 2, \_SB.PCI0.LNKD, 0 },
-		Package () { 0x0000ffff, 3, \_SB.PCI0.LNKA, 0 } })
+		Package () { 0x0000ffff, 0, 0, 10 },
+		Package () { 0x0000ffff, 1, 0, 11 },
+		Package () { 0x0000ffff, 2, 0, 11 },
+		Package () { 0x0000ffff, 3, 0, 11 } })
 
 	/* Interrupt Map INTA->INTC, INTB->INTD, INTC->INTA, INTD->INTB */
 	Name (IQCA, Package () {
@@ -48,10 +48,10 @@ Method (IRQM, 1, Serialized) {
 		Package () { 0x0000ffff, 2, 0, 16 },
 		Package () { 0x0000ffff, 3, 0, 17 } })
 	Name (IQCP, Package () {
-		Package () { 0x0000ffff, 0, \_SB.PCI0.LNKC, 0 },
-		Package () { 0x0000ffff, 1, \_SB.PCI0.LNKD, 0 },
-		Package () { 0x0000ffff, 2, \_SB.PCI0.LNKA, 0 },
-		Package () { 0x0000ffff, 3, \_SB.PCI0.LNKB, 0 } })
+		Package () { 0x0000ffff, 0, 0, 11 },
+		Package () { 0x0000ffff, 1, 0, 11 },
+		Package () { 0x0000ffff, 2, 0, 11 },
+		Package () { 0x0000ffff, 3, 0, 10 } })
 
 	/* Interrupt Map INTA->INTD, INTB->INTA, INTC->INTB, INTD->INTC */
 	Name (IQDA, Package () {
@@ -60,10 +60,10 @@ Method (IRQM, 1, Serialized) {
 		Package () { 0x0000ffff, 2, 0, 17 },
 		Package () { 0x0000ffff, 3, 0, 18 } })
 	Name (IQDP, Package () {
-		Package () { 0x0000ffff, 0, \_SB.PCI0.LNKD, 0 },
-		Package () { 0x0000ffff, 1, \_SB.PCI0.LNKA, 0 },
-		Package () { 0x0000ffff, 2, \_SB.PCI0.LNKB, 0 },
-		Package () { 0x0000ffff, 3, \_SB.PCI0.LNKC, 0 } })
+		Package () { 0x0000ffff, 0, 0, 11 },
+		Package () { 0x0000ffff, 1, 0, 11 },
+		Package () { 0x0000ffff, 2, 0, 10 },
+		Package () { 0x0000ffff, 3, 0, 11 } })
 
 	Switch (ToInteger (Arg0))
 	{
diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl
index eabff66738..dfa29751a6 100644
--- a/src/soc/intel/cannonlake/acpi/southbridge.asl
+++ b/src/soc/intel/cannonlake/acpi/southbridge.asl
@@ -20,9 +20,6 @@
 #include <soc/itss.h>
 #include <soc/pcr_ids.h>
 
-/* Interrupt Routing */
-#include "irqlinks.asl"
-
 /* PCI IRQ assignment */
 #include "pci_irqs.asl"