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| author | Nick Vaccaro <nvaccaro@google.com> | 2017-08-29 19:55:57 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-01 17:27:02 +0000 |
| commit | 9b675796a7407972a60c66ae5f9689f660e12a8e (patch) | |
| tree | 966f43baeffa60fd2d14ecfb7583e8ed000f74f8 /src/soc | |
| parent | 69b5cdb33c3b324c8ce3dc9d4679c2b9acaf3b8a (diff) | |
| download | coreboot-9b675796a7407972a60c66ae5f9689f660e12a8e.tar.xz | |
soc/intel/cannonlake: add *spi.c files to make
Adds spi.c and gspi.c to verstage.
Change-Id: I363d9aafa989c5a7a0b36ad9edf1c70a75604d28
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/21284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 9ce647daa4..dba04a85fa 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -44,6 +44,9 @@ postcar-y += pmutil.c postcar-y += spi.c postcar-$(CONFIG_UART_DEBUG) += uart.c +verstage-y += gspi.c +verstage-y += spi.c + CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20 CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake |