mediatek/mt8173: Add da9212 driver

Add secondary PMIC for external buck control on Oak rev0/1/2/5

BRANCH=none
BUG=none
TEST=verified on Oak rev4/rev5

Change-Id: Ia000b0c7d61e8396856656247f9627e33b21b19b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 241508e7d781fac8ee085ee81962043dd654c52d
Original-Change-Id: I6c75e2462363a5523bf1ebb03af7a36740293624
Original-Signed-off-by: henryc.chen <henryc.chen@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/332342
Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/14122
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

3 files changed, 182 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc
index 6ba533adad..217cbc342c 100644
--- a/src/soc/mediatek/mt8173/Makefile.inc
+++ b/src/soc/mediatek/mt8173/Makefile.inc
@@ -67,6 +67,7 @@ ramstage-y += timer.c
 ramstage-$(CONFIG_DRIVERS_UART) += uart.c
 ramstage-y += pmic_wrap.c mt6391.c i2c.c
 ramstage-y += mt6311.c
+ramstage-y += da9212.c
 ramstage-y += gpio.c
 ramstage-y += wdt.c
 ramstage-y += pll.c
diff --git a/src/soc/mediatek/mt8173/da9212.c b/src/soc/mediatek/mt8173/da9212.c
new file mode 100644
index 0000000000..8161667fa9
--- /dev/null
+++ b/src/soc/mediatek/mt8173/da9212.c
@@ -0,0 +1,96 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <device/i2c.h>
+#include <soc/da9212.h>
+
+enum {
+	DA9212_SLAVE_ADDR = 0x68,
+};
+
+static void da9212_hw_init(uint8_t i2c_num, unsigned char variant_id)
+{
+	int ret = 0;
+	int buck_mode = DA9212_BUCK_MODE_AUTO;
+
+	if (variant_id == DA9212_VARIANT_ID_AB)
+		buck_mode = DA9212_BUCK_MODE_PWM;
+
+	/* page select to 0 */
+	ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR,
+			       DA9212_REG_PAGE_CON, DA9212_REG_PAGE0,
+			       DA9212_REG_PAGE_MASK, DA9212_REG_PAGE_SHIFT);
+
+	ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR,
+			       DA9212_REG_BUCKA_CONT, DA9212_BUCK_GPI_GPIO1,
+			       DA9212_BUCK_GPI_MASK, DA9212_BUCK_GPI_SHIFT);
+
+	ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR,
+			       DA9212_REG_BUCKB_CONT, DA9212_BUCK_GPI_OFF,
+			       DA9212_BUCK_GPI_OFF, DA9212_BUCK_GPI_SHIFT);
+
+	ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR,
+			       DA9212_REG_BUCKA_CONT, DA9212_VBUCK_SEL_A,
+			       DA9212_VBUCK_SEL_MASK, DA9212_VBUCK_SEL_SHIFT);
+
+	ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR,
+			       DA9212_REG_BUCKB_CONT, DA9212_VBUCK_SEL_A,
+			       DA9212_VBUCK_SEL_MASK, DA9212_VBUCK_SEL_SHIFT);
+
+	ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR,
+			       DA9212_REG_BUCKA_CONF, buck_mode,
+			       DA9212_BUCK_MODE_MASK, DA9212_BUCK_MODE_SHIFT);
+
+	ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR,
+			       DA9212_REG_BUCKB_CONF, buck_mode,
+			       DA9212_BUCK_MODE_MASK, DA9212_BUCK_MODE_SHIFT);
+
+	if (ret)
+		printk(BIOS_ERR, "ERROR: %s failed\n", __func__);
+
+}
+
+void da9212_probe(uint8_t i2c_num)
+{
+	int ret = 0;
+	unsigned char device_id = 0;
+	unsigned char variant_id = 0;
+
+
+	/* select to page 4, clear REVERT at first time */
+	ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR,
+			       DA9212_REG_PAGE_CON, DA9212_REG_PAGE4,
+			       0xF, DA9212_REG_PAGE_SHIFT);
+
+	ret |= i2c_read_field(i2c_num, DA9212_SLAVE_ADDR,
+			      DA9212_REG_DEVICE_ID, &device_id,
+			      0xFF, 0);
+
+	ret |= i2c_read_field(i2c_num, DA9212_SLAVE_ADDR,
+			      DA9212_REG_VARIANT_ID, &variant_id,
+			      0xFF, 0);
+
+	printk(BIOS_INFO, "%s: device ID = %#x, variant ID = %#x\n", __func__,
+	       device_id, variant_id);
+
+	/* Check device ID is DA9212 */
+	if (device_id != DA9212_ID || ret) {
+		printk(BIOS_ERR, "ERROR: unknown DA9212 device_id\n");
+		return;
+	}
+
+	da9212_hw_init(i2c_num, variant_id);
+}
diff --git a/src/soc/mediatek/mt8173/include/soc/da9212.h b/src/soc/mediatek/mt8173/include/soc/da9212.h
new file mode 100644
index 0000000000..388958d92b
--- /dev/null
+++ b/src/soc/mediatek/mt8173/include/soc/da9212.h
@@ -0,0 +1,85 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_DA9212_H_
+#define __SOC_DA9212_H_
+
+void da9212_probe(uint8_t i2c_num);
+
+enum {
+	/* Page selection */
+	DA9212_REG_PAGE_CON = 0x0,
+
+	/* Regulator Registers */
+	DA9212_REG_BUCKA_CONT = 0x5D,
+	DA9212_REG_BUCKB_CONT = 0x5E,
+	DA9212_REG_BUCKA_CONF = 0xD1,
+	DA9212_REG_BUCKB_CONF = 0xD2,
+};
+
+/* DA9212_REG_PAGE_CON (addr=0x0) */
+enum {
+	DA9212_REG_PAGE_SHIFT = 0,
+	DA9212_REG_PAGE_MASK = 0xf
+};
+
+enum {
+	DA9212_REG_PAGE0 = 0,
+	DA9212_REG_PAGE2 = 2,
+	DA9212_REG_PAGE4 = 4,
+	DA9212_PAGE_WRITE_MODE = 0x0,
+	DA9212_REPEAT_WRITE_MODE = 0x40,
+	DA9212_PAGE_REVERT = 0x80
+};
+
+/* DA9212_REG_BUCKA/B_CONT (addr=0x5D/0x5E) */
+enum {
+	DA9212_BUCK_EN_SHIFT = 0,
+	DA9212_BUCK_OFF = 0x0,
+	DA9212_BUCK_ON = 0x1,
+	DA9212_BUCK_GPI_SHIFT = 1,
+	DA9212_BUCK_GPI_MASK = 0x3,
+	DA9212_BUCK_GPI_OFF = 0x0,
+	DA9212_BUCK_GPI_GPIO0 = 0x1,
+	DA9212_BUCK_GPI_GPIO1 = 0x2,
+	DA9212_BUCK_GPI_GPIO4 = 0x3,
+	DA9212_VBUCK_SEL_SHIFT = 4,
+	DA9212_VBUCK_SEL_MASK = 0x1,
+	DA9212_VBUCK_SEL_A = 0x0,
+	DA9212_VBUCK_SEL_B = 0x1,
+};
+
+/* DA9212_REG_BUCKA/B_CONF (addr=0xD1/0xD2) */
+enum {
+	DA9212_BUCK_MODE_SHIFT = 0,
+	DA9212_BUCK_MODE_MASK = 0x3,
+	DA9212_BUCK_MODE_MANUAL = 0x0,
+	DA9212_BUCK_MODE_PFM = 0x1,
+	DA9212_BUCK_MODE_PWM = 0x2,
+	DA9212_BUCK_MODE_AUTO = 0x3,
+};
+
+/* DA9212_REG_CONFIG_E (addr=0x147) */
+enum {
+	/* DEVICE IDs */
+	DA9212_REG_DEVICE_ID = 0x1,
+	DA9212_ID	     = 0x22,
+	DA9213_ID	     = 0x23,
+	DA9212_REG_VARIANT_ID = 0x2,
+	DA9212_VARIANT_ID_AB  = 0x10,
+	DA9212_VARIANT_ID_AC  = 0x20
+};
+
+#endif