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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-03 21:28:40 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-16 00:36:37 +0000
commit1dbf31014f0730962e80cf99f8173070191cb36f (patch)
treef0bb977ab0ba921b355c97febff2a8d1865fb123 /src/soc
parent047a9e4ddc76c399329de8b048be6cd8a0607a70 (diff)
downloadcoreboot-1dbf31014f0730962e80cf99f8173070191cb36f.tar.xz
amd/stoneyridge: Rename ramtop.c to memmap.c
Use a name consistent with the more recent soc/intel. Change-Id: I4d67a7c3107758c81a67e1668875767beccfcdb0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34879 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/stoneyridge/Makefile.inc6
-rw-r--r--src/soc/amd/stoneyridge/memmap.c (renamed from src/soc/amd/stoneyridge/ramtop.c)0
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index 150df3abd9..0fed074523 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -62,7 +62,7 @@ romstage-y += pmutil.c
romstage-y += reset.c
romstage-y += smbus.c
romstage-y += smbus_spd.c
-romstage-y += ramtop.c
+romstage-y += memmap.c
romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
romstage-y += tsc_freq.c
romstage-y += southbridge.c
@@ -82,7 +82,7 @@ verstage-$(CONFIG_SPI_FLASH) += spi.c
postcar-y += monotonic_timer.c
postcar-$(CONFIG_STONEYRIDGE_UART) += uart.c
-postcar-y += ramtop.c
+postcar-y += memmap.c
postcar-y += nb_util.c
postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += i2c.c
postcar-y += tsc_freq.c
@@ -103,7 +103,7 @@ ramstage-y += reset.c
ramstage-y += sata.c
ramstage-y += sm.c
ramstage-y += smbus.c
-ramstage-y += ramtop.c
+ramstage-y += memmap.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
ramstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/memmap.c
index 09af7e4de7..09af7e4de7 100644
--- a/src/soc/amd/stoneyridge/ramtop.c
+++ b/src/soc/amd/stoneyridge/memmap.c