diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2018-11-14 15:45:39 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2018-11-15 15:05:43 +0000 |
| commit | 2a244c682e76eaa048fb15a5e1858d7968fca2cf (patch) | |
| tree | 52e8fd321d1c32f18710ce89c1f6440ce0248e93 /src/soc | |
| parent | 75bdd43eb191b408c38c7bb9219c9bb5560cb643 (diff) | |
| download | coreboot-2a244c682e76eaa048fb15a5e1858d7968fca2cf.tar.xz | |
soc/intel/cannonlake: Make static IRQ mapping for PIC mode
This patch makes static PIRQ->IRQ mapping, where IRQ10 is mapped
to PBRC and IRQ11 is mapped for PARC/PCRC/PDRC/PERC/PFRC/PGRC/PHRC.
Change-Id: I8722e34841fe53a4d425202b915ac7838af0d859
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/29629
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/cannonlake/chip.h | 11 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/lpc.c | 26 |
2 files changed, 13 insertions, 24 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 015133e9ed..4f30382d2d 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -43,17 +43,6 @@ struct soc_intel_cannonlake_config { /* Common struct containing soc config data required by common code */ struct soc_intel_common_config common_soc_config; - /* Interrupt Routing configuration. - * If bit7 is 1, the interrupt is disabled. */ - uint8_t pirqa_routing; - uint8_t pirqb_routing; - uint8_t pirqc_routing; - uint8_t pirqd_routing; - uint8_t pirqe_routing; - uint8_t pirqf_routing; - uint8_t pirqg_routing; - uint8_t pirqh_routing; - /* GPE configuration */ uint32_t gpe0_en_1; /* GPE0_EN_31_0 */ uint32_t gpe0_en_2; /* GPE0_EN_63_32 */ diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c index 84a2138efd..c058065043 100644 --- a/src/soc/intel/cannonlake/lpc.c +++ b/src/soc/intel/cannonlake/lpc.c @@ -30,6 +30,7 @@ #include <intelblocks/pcr.h> #include <reg_script.h> #include <soc/iomap.h> +#include <soc/irq.h> #include <soc/lpc.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> @@ -145,17 +146,16 @@ static void pch_enable_ioapic(const struct device *dev) void soc_pch_pirq_init(const struct device *dev) { - const config_t *config = dev->chip_info; uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG]; - pch_interrupt_routing[0] = config->pirqa_routing; - pch_interrupt_routing[1] = config->pirqb_routing; - pch_interrupt_routing[2] = config->pirqc_routing; - pch_interrupt_routing[3] = config->pirqd_routing; - pch_interrupt_routing[4] = config->pirqe_routing; - pch_interrupt_routing[5] = config->pirqf_routing; - pch_interrupt_routing[6] = config->pirqg_routing; - pch_interrupt_routing[7] = config->pirqh_routing; + pch_interrupt_routing[0] = PCH_IRQ11; + pch_interrupt_routing[1] = PCH_IRQ10; + pch_interrupt_routing[2] = PCH_IRQ11; + pch_interrupt_routing[3] = PCH_IRQ11; + pch_interrupt_routing[4] = PCH_IRQ11; + pch_interrupt_routing[5] = PCH_IRQ11; + pch_interrupt_routing[6] = PCH_IRQ11; + pch_interrupt_routing[7] = PCH_IRQ11; itss_irq_init(pch_interrupt_routing); #if defined(__SIMPLE_DEVICE__) @@ -173,16 +173,16 @@ void soc_pch_pirq_init(const struct device *dev) switch (int_pin) { case 1: /* INTA# */ - int_line = config->pirqa_routing; + int_line = PCH_IRQ11; break; case 2: /* INTB# */ - int_line = config->pirqb_routing; + int_line = PCH_IRQ10; break; case 3: /* INTC# */ - int_line = config->pirqc_routing; + int_line = PCH_IRQ11; break; case 4: /* INTD# */ - int_line = config->pirqd_routing; + int_line = PCH_IRQ11; break; } |