summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorMartin Roth <martinroth@google.com>2015-12-18 10:46:59 -0700
committerMartin Roth <martinroth@google.com>2015-12-20 02:41:57 +0100
commit2b2ff7fa6a9af366c1a9b8e4cb6f7f566048b0d7 (patch)
tree0357bd47d2f2de60ee31ee5a06f00285e4021da9 /src/soc
parent9f25da1f490e3e6ce02936c8d6404c68699b5aff (diff)
downloadcoreboot-2b2ff7fa6a9af366c1a9b8e4cb6f7f566048b0d7.tar.xz
soc/intel/broadwell: Init var before use, only use when needed
root_port_init_config() pcie.c wasn't initializing a variable before passing its pointer to pch_iobp_exec(). pch_iobp_exec() wrote the uninitialized value into a register. In theory, the register would only be used if data was being written, and pch_iobp_exec() was being used to read the data, not write it, so this change shouldn't have any practical effect. Fixes coverity error: CID 1293134 (#1 of 1): Uninitialized scalar variable (UNINIT) Change-Id: I5d17863d904c6b1ceb30d72b94cd7a40c8fbb437 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12778 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/broadwell/iobp.c3
-rw-r--r--src/soc/intel/broadwell/pcie.c2
2 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/iobp.c b/src/soc/intel/broadwell/iobp.c
index de7f3c935f..031d2bd70e 100644
--- a/src/soc/intel/broadwell/iobp.c
+++ b/src/soc/intel/broadwell/iobp.c
@@ -136,7 +136,8 @@ void pch_iobp_exec(u32 addr, u16 op_code, u8 route_id, u32 *data, u8 *resp)
/* RCBA233A[15:8] = 0xf0 RCBA233A[7:0] = Route ID */
RCBA16(IOBPU) = IOBPU_MAGIC | route_id;
- RCBA32(IOBPD) = *data;
+ if (op_code == IOBP_PCICFG_WRITE)
+ RCBA32(IOBPD) = *data;
/* Set RCBA2338[0] to trigger IOBP transaction*/
RCBA16(IOBPS) = RCBA16(IOBPS) | 0x1;
diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c
index 5ca0d25f55..41d66e2f2a 100644
--- a/src/soc/intel/broadwell/pcie.c
+++ b/src/soc/intel/broadwell/pcie.c
@@ -120,7 +120,7 @@ static void pcie_iosf_port_grant_count(device_t dev)
static void root_port_init_config(device_t dev)
{
int rp;
- u32 data;
+ u32 data = 0;
u8 resp, id;
if (root_port_is_first(dev)) {