diff options
| author | Martin Roth <martinroth@google.com> | 2015-09-28 15:27:24 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-10-05 17:43:11 +0000 |
| commit | 3a54318856428cda41c5a45e41c4da727d352bf6 (patch) | |
| tree | b318ca7a8576d130ec18e853543d21542114d41b /src/soc | |
| parent | f35f5ff3cd86b247a1e8ff1df8d071a3a4556079 (diff) | |
| download | coreboot-3a54318856428cda41c5a45e41c4da727d352bf6.tar.xz | |
Add EM100 'hyper term' spi console support in ramstage & smm
The EM100Pro allows the debug console to be sent over the SPI bus.
This is not yet working in romstage due to the use of static variables
in the SPI driver code. It is also not working on chipsets that have
SPI write buffers of less than 10 characters due to the 9 byte
command/header length specified by the EM100 protocol.
While this currently works only with the EM100, it seems like it would
be useful on any logic analyzer with SPI debug - just filter on command
bytes of 0x11.
Change-Id: Icd42ccd96cab0a10a4e70f4b02ecf9de8169564b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11743
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/baytrail/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/braswell/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/fsp_baytrail/Kconfig | 1 |
4 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 921f568fa9..8de32de8f4 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -36,6 +36,7 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select SOC_INTEL_COMMON select HAVE_INTEL_FIRMWARE + select HAVE_SPI_CONSOLE_SUPPORT config BOOTBLOCK_CPU_INIT string diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index f76b9b244c..5a41056103 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -49,6 +49,7 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select USE_GENERIC_FSP_CAR_INC select HAVE_INTEL_FIRMWARE + select HAVE_SPI_CONSOLE_SUPPORT config BOOTBLOCK_CPU_INIT string diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 6561fe27fa..33644e840b 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -43,6 +43,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON select HAVE_INTEL_FIRMWARE select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE + select HAVE_SPI_CONSOLE_SUPPORT config BOOTBLOCK_CPU_INIT string diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index 36229de7a2..d9114fc008 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -48,6 +48,7 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_INTEL_FIRMWARE + select HAVE_SPI_CONSOLE_SUPPORT config SOC_INTEL_FSP_BAYTRAIL_MD bool |