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authorNico Huber <nico.h@gmx.de>2019-08-05 21:12:33 +0200
committerNico Huber <nico.h@gmx.de>2019-08-09 09:37:32 +0000
commit3e786b55463fc656fd3c23823b42b72591eb3d21 (patch)
tree76946c7658392d6ee5f046ef7edce521bc849ee0 /src/soc
parent2fe596e6778ca1e9bc5a1f0f585604d000297426 (diff)
downloadcoreboot-3e786b55463fc656fd3c23823b42b72591eb3d21.tar.xz
soc/intel: Drop pmc_soc_restore_power_failure()
Get rid of this function and its dangerous, weak implementation. Instead, call pmc_set_power_failure_state() directly from the SMI handler. Change-Id: I0718afc5db66447c93289643f9097a4257b10934 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34727 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/apollolake/pmc.c5
-rw-r--r--src/soc/intel/cannonlake/pmc.c5
-rw-r--r--src/soc/intel/common/block/include/intelblocks/pmclib.h6
-rw-r--r--src/soc/intel/common/block/pmc/pmclib.c12
-rw-r--r--src/soc/intel/common/block/smm/smihandler.c3
-rw-r--r--src/soc/intel/icelake/pmc.c5
-rw-r--r--src/soc/intel/skylake/pmc.c5
7 files changed, 2 insertions, 39 deletions
diff --git a/src/soc/intel/apollolake/pmc.c b/src/soc/intel/apollolake/pmc.c
index 872a94be19..286cd8a286 100644
--- a/src/soc/intel/apollolake/pmc.c
+++ b/src/soc/intel/apollolake/pmc.c
@@ -105,11 +105,6 @@ void pmc_soc_set_afterg3_en(const bool on)
write32(gen_pmcon1, reg32);
}
-void pmc_soc_restore_power_failure(void)
-{
- pmc_set_power_failure_state(false);
-}
-
void pmc_soc_init(struct device *dev)
{
const struct soc_intel_apollolake_config *cfg = config_of(dev);
diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c
index 9916fe8812..0e7cc17b4a 100644
--- a/src/soc/intel/cannonlake/pmc.c
+++ b/src/soc/intel/cannonlake/pmc.c
@@ -45,11 +45,6 @@ void pmc_soc_set_afterg3_en(const bool on)
write8(pmcbase + GEN_PMCON_A, reg8);
}
-void pmc_soc_restore_power_failure(void)
-{
- pmc_set_power_failure_state(false);
-}
-
static void pm1_enable_pwrbtn_smi(void *unused)
{
/*
diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h
index 8947a22653..caf21f0ca6 100644
--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h
+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h
@@ -127,12 +127,6 @@ void pmc_clear_all_gpe_status(void);
void pmc_clear_prsts(void);
/*
- * Set PMC register to know which state system should be after
- * power reapplied
- */
-void pmc_soc_restore_power_failure(void);
-
-/*
* Enable or disable global reset. If global reset is enabled, hard reset and
* soft reset will trigger global reset, where both host and TXE are reset.
* This is cleared on cold boot, hard reset, soft reset and Sx.
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index ee99735547..7fb4d5e807 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -79,18 +79,6 @@ __weak uint32_t soc_get_smi_status(uint32_t generic_sts)
return generic_sts;
}
-/*
- * Set PMC register to know which state system should be after
- * power reapplied
- */
-__weak void pmc_soc_restore_power_failure(void)
-{
- /*
- * SoC code should set PMC config register in order to set
- * MAINBOARD_POWER_ON bit as per EDS.
- */
-}
-
int acpi_get_sleep_type(void)
{
struct chipset_power_state *ps;
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index 7aa69c5c65..abd699ac2b 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -29,6 +29,7 @@
#include <intelblocks/uart.h>
#include <smmstore.h>
#include <soc/nvs.h>
+#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/gpio.h>
#include <soc/iomap.h>
@@ -221,7 +222,7 @@ void smihandler_southbridge_sleep(
/* Disable all GPE */
pmc_disable_all_gpe();
/* Set which state system will be after power reapplied */
- pmc_soc_restore_power_failure();
+ pmc_set_power_failure_state(false);
/* also iterates over all bridges on bus 0 */
busmaster_disable_on_bus(0);
diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c
index a66d01fb10..1889c4b82a 100644
--- a/src/soc/intel/icelake/pmc.c
+++ b/src/soc/intel/icelake/pmc.c
@@ -42,11 +42,6 @@ void pmc_soc_set_afterg3_en(const bool on)
write8(pmcbase + GEN_PMCON_A, reg8);
}
-void pmc_soc_restore_power_failure(void)
-{
- pmc_set_power_failure_state(false);
-}
-
static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
{
uint32_t reg;
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index 7bdc7f33b8..ffe060518e 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -68,11 +68,6 @@ void pmc_soc_set_afterg3_en(const bool on)
pci_write_config8(dev, GEN_PMCON_B, reg8);
}
-void pmc_soc_restore_power_failure(void)
-{
- pmc_set_power_failure_state(false);
-}
-
#if ENV_RAMSTAGE
/* Fill up PMC resource structure */
int pmc_soc_get_resources(struct pmc_resource_config *cfg)