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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-05-25 09:47:01 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-29 20:03:14 +0000 |
commit | 8a1b94ccbeca88b8fba96329477e99ea8535c244 (patch) | |
tree | f88d02677ce54e300fe90582dac67134da62ae91 /src/soc | |
parent | 6d6945b807469675f872124f33250d2e5c0f14b8 (diff) | |
download | coreboot-8a1b94ccbeca88b8fba96329477e99ea8535c244.tar.xz |
Clean up unused arch/early_variables.h header
Change-Id: Ib863e23863ba6d7504b6c4d32de2f1fea4e57fec
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32996
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/broadwell/romstage/romstage.c | 1 | ||||
-rw-r--r-- | src/soc/intel/broadwell/romstage/uart.c | 1 | ||||
-rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi_flash.c | 1 | ||||
-rw-r--r-- | src/soc/intel/common/block/scs/early_mmc.c | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/romstage/romstage.c | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 1 |
6 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index f8571678d8..9bca716447 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -16,7 +16,6 @@ #include <stddef.h> #include <stdint.h> #include <arch/cbfs.h> -#include <arch/early_variables.h> #include <bootblock_common.h> #include <bootmode.h> #include <cbmem.h> diff --git a/src/soc/intel/broadwell/romstage/uart.c b/src/soc/intel/broadwell/romstage/uart.c index 58450dd834..a1a29b65fd 100644 --- a/src/soc/intel/broadwell/romstage/uart.c +++ b/src/soc/intel/broadwell/romstage/uart.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <arch/early_variables.h> #include <device/pci_def.h> #include <reg_script.h> #include <stdint.h> diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c index 97e231ca3f..0a4344272e 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <arch/early_variables.h> #include <device/mmio.h> #include <console/console.h> #include <fast_spi_def.h> diff --git a/src/soc/intel/common/block/scs/early_mmc.c b/src/soc/intel/common/block/scs/early_mmc.c index 4b15bb48bb..8f47ec7d9e 100644 --- a/src/soc/intel/common/block/scs/early_mmc.c +++ b/src/soc/intel/common/block/scs/early_mmc.c @@ -14,7 +14,6 @@ */ #include <arch/acpi.h> -#include <arch/early_variables.h> #include <cbmem.h> #include <commonlib/storage/sd_mmc.h> #include <commonlib/sd_mmc_ctrlr.h> diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 12239ae13e..29c4774dc1 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -15,7 +15,6 @@ */ #include <arch/cbfs.h> -#include <arch/early_variables.h> #include <assert.h> #include <console/console.h> #include <cpu/x86/mtrr.h> diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 96937d651d..04c369beb8 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -14,7 +14,6 @@ */ #include <arch/cpu.h> -#include <arch/early_variables.h> #include <arch/symbols.h> #include <assert.h> #include <cpu/x86/mtrr.h> |