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| author | Furquan Shaikh <furquan@google.com> | 2016-05-04 23:25:16 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-05-09 05:01:58 +0200 |
| commit | 94b18a1757e66c2e3094bd1116a88db36cbb4f79 (patch) | |
| tree | 4c4686dfc4f7d70d7f4f74b7c06e8b40bed6edf0 /src/soc | |
| parent | 2e78aa5a78d67d8bd5ef90bb89d01fc82faadc8a (diff) | |
| download | coreboot-94b18a1757e66c2e3094bd1116a88db36cbb4f79.tar.xz | |
xip: Do not pass --xip for early stages if CAR supports code execution
On modern x86 platforms like apollolake, pre-RAM stages verstage and
romstage run within the cache-as-ram region. Thus, we do not need to
pass in the --xip parameter to cbfstool while adding these
stages. Introduce a new Kconfig variable NO_XIP_EARLY_STAGES which is
default false for all x86 platforms. Apollolake selects this option
since it supports code execution with CAR.
Change-Id: I2848046472f40f09ce7fc230c258b0389851b2ea
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/14623
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index d52d592d07..d6d4d1f86d 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -24,6 +24,7 @@ config CPU_SPECIFIC_OPTIONS select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT select NO_FIXED_XIP_ROM_SIZE + select NO_XIP_EARLY_STAGES select PARALLEL_MP select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK |