mediatek/mt8183: Add AUXADC driver

We plan to get board id and RAM code from AUXADC on Kukui. Add AUXADC
driver to support it.

BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui

Change-Id: I121a6a0240f9c517c0cbc07e0c18b09167849ff1
Signed-off-by: Po Xu <jg_poxu@mediatek.com>
Reviewed-on: https://review.coreboot.org/29061
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

4 files changed, 107 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc
index 5650465ef3..944c9b1d18 100644
--- a/src/soc/mediatek/mt8183/Makefile.inc
+++ b/src/soc/mediatek/mt8183/Makefile.inc
@@ -1,5 +1,6 @@
 ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y)
 
+bootblock-y += auxadc.c
 bootblock-y += bootblock.c
 bootblock-y += ../common/gpio.c gpio.c
 bootblock-y += ../common/pll.c pll.c
@@ -14,12 +15,14 @@ decompressor-y += decompressor.c
 decompressor-y += ../common/mmu_operations.c
 decompressor-y += ../common/timer.c
 
+verstage-y += auxadc.c
 verstage-y += ../common/gpio.c gpio.c
 verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
 verstage-y += ../common/timer.c
 verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
 verstage-y += ../common/wdt.c
 
+romstage-y += auxadc.c
 romstage-y += ../common/cbmem.c emi.c
 romstage-y += dramc_init_setting.c
 romstage-y += memory.c
@@ -30,6 +33,7 @@ romstage-y += ../common/timer.c
 romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
 romstage-y += ../common/wdt.c
 
+ramstage-y += auxadc.c
 ramstage-y += ../common/cbmem.c emi.c
 ramstage-y += ../common/gpio.c gpio.c
 ramstage-y += ../common/mmu_operations.c mmu_operations.c
diff --git a/src/soc/mediatek/mt8183/auxadc.c b/src/soc/mediatek/mt8183/auxadc.c
new file mode 100644
index 0000000000..af88efb3b9
--- /dev/null
+++ b/src/soc/mediatek/mt8183/auxadc.c
@@ -0,0 +1,68 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <assert.h>
+#include <console/console.h>
+#include <delay.h>
+#include <soc/addressmap.h>
+#include <soc/auxadc.h>
+#include <soc/infracfg.h>
+#include <timer.h>
+
+static struct mtk_auxadc_regs *const mtk_auxadc = (void *)AUXADC_BASE;
+
+/*
+ * Wait until a condition becomes true or times out
+ *
+ * cond : a C expression to wait for
+ * timeout : msecs
+ */
+#define wait_ms(cond, timeout)					\
+({								\
+	struct stopwatch sw;					\
+	int expired = 0;					\
+	stopwatch_init_msecs_expire(&sw, timeout);		\
+	while (!(cond) && !(expired = stopwatch_expired(&sw)))	\
+		; /* wait */					\
+	assert(!expired);					\
+})
+
+static uint32_t auxadc_get_rawdata(int channel)
+{
+	setbits_le32(&mt8183_infracfg->module_sw_cg_1_clr, 1 << 10);
+	wait_ms(!(read32(&mtk_auxadc->con2) & 0x1), 300);
+
+	clrbits_le32(&mtk_auxadc->con1, 1 << channel);
+	wait_ms(!(read32(&mtk_auxadc->data[channel]) & (1 << 12)), 300);
+
+	setbits_le32(&mtk_auxadc->con1, 1 << channel);
+	udelay(25);
+	wait_ms(read32(&mtk_auxadc->data[channel]) & (1 << 12), 300);
+
+	uint32_t value = read32(&mtk_auxadc->data[channel]) & 0x0FFF;
+
+	setbits_le32(&mt8183_infracfg->module_sw_cg_1_set, 1 << 10);
+
+	return value;
+}
+
+int auxadc_get_voltage(unsigned int channel)
+{
+	assert(channel < 16);
+
+	/* 1.5V in 4096 steps */
+	return (int)((int64_t)auxadc_get_rawdata(channel) * 1500000 / 4096);
+}
diff --git a/src/soc/mediatek/mt8183/include/soc/addressmap.h b/src/soc/mediatek/mt8183/include/soc/addressmap.h
index 1ba9cc88ee..cee9bd8160 100644
--- a/src/soc/mediatek/mt8183/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8183/include/soc/addressmap.h
@@ -32,6 +32,7 @@ enum {
 	EMI_BASE		= IO_PHYS + 0x00219000,
 	EMI_MPU_BASE		= IO_PHYS + 0x00226000,
 	DRAMC_CH_BASE		= IO_PHYS + 0x00228000,
+	AUXADC_BASE		= IO_PHYS + 0x01001000,
 	UART0_BASE		= IO_PHYS + 0x01002000,
 	SPI0_BASE               = IO_PHYS + 0x0100A000,
 	SPI1_BASE		= IO_PHYS + 0x01010000,
diff --git a/src/soc/mediatek/mt8183/include/soc/auxadc.h b/src/soc/mediatek/mt8183/include/soc/auxadc.h
new file mode 100644
index 0000000000..aafc8a1df4
--- /dev/null
+++ b/src/soc/mediatek/mt8183/include/soc/auxadc.h
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _MTK_ADC_H
+#define _MTK_ADC_H
+
+#include <stdint.h>
+
+typedef struct mtk_auxadc_regs {
+	uint32_t con0;
+	uint32_t con1;
+	uint32_t con1_set;
+	uint32_t con1_clr;
+	uint32_t con2;
+	uint32_t data[16];
+	uint32_t reserved[16];
+	uint32_t misc;
+} mtk_auxadc_regs;
+
+/* Return voltage in uVolt */
+int auxadc_get_voltage(unsigned int channel);
+#endif