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authorTristan Shieh <tristan.shieh@mediatek.com>2018-06-15 14:16:48 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-06-21 09:40:51 +0000
commit97bdb9aa31ada2b4fbf0aa5e0e3744294427f927 (patch)
treeb985dba586f7e3ebc0ff15e5c1a2cfe136d1bb37 /src/soc
parent4c6dfbc2c10a14fb816c681fb03b601412ea7c3b (diff)
downloadcoreboot-97bdb9aa31ada2b4fbf0aa5e0e3744294427f927.tar.xz
mediatek/mt8183: Remove DRAM_DMA section
DRAM_DMA section is used for the special SPI NOR controller on legacy SOC. Remove it since no driver need it currently and we don't have the special SPI NOR controller on mt8183. BUG=b:80501386 BRANCH=none TEST=Boots fine on Kukui Change-Id: I6ba0757adbf4f1f8d2688e5ab1a36007e4e0d0fd Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/mediatek/mt8183/include/soc/memlayout.ld8
1 files changed, 1 insertions, 7 deletions
diff --git a/src/soc/mediatek/mt8183/include/soc/memlayout.ld b/src/soc/mediatek/mt8183/include/soc/memlayout.ld
index 541f21e0eb..f44c74b0e5 100644
--- a/src/soc/mediatek/mt8183/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8183/include/soc/memlayout.ld
@@ -25,11 +25,6 @@
#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr)
#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr)
-#define DRAM_DMA(addr, size) \
- REGION(dram_dma, addr, size, 4K) \
- _ = ASSERT(size % 4K == 0, \
- "DRAM DMA buffer should be multiple of smallest page size (4K)!");
-
SECTIONS
{
SRAM_START(0x00100000)
@@ -50,7 +45,6 @@ SECTIONS
SRAM_L2C_END(0x00280000)
DRAM_START(0x40000000)
- DRAM_DMA(0x40000000, 1M)
- POSTRAM_CBFS_CACHE(0x40100000, 1M)
+ POSTRAM_CBFS_CACHE(0x40000000, 2M)
RAMSTAGE(0x40200000, 256K)
}