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authorMichael Niewöhner <foss@mniewoehner.de>2019-10-26 10:44:33 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-10-31 10:33:07 +0000
commitdb8f9229b1a17a5084c828ff8b078cec45f6ac99 (patch)
treeb801e469b13ffdf37df14f53c23aa0a496ed2955 /src/soc
parent02d9071a0b4d0720dde569de9550c17d89bc100a (diff)
downloadcoreboot-db8f9229b1a17a5084c828ff8b078cec45f6ac99.tar.xz
soc/intel/icelake: adapt FSP GOP param to match the other FSP2.0 platforms
Set the FSP parameter PeiGraphicsPeimInit according to RUN_FSP_GOP to enable or skip GOP. Change-Id: I5993e64631f86ff0f9ae069e10b89df8bc4cd085 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36353 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/icelake/fsp_params.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c
index 8819e7d033..62c69da2f2 100644
--- a/src/soc/intel/icelake/fsp_params.c
+++ b/src/soc/intel/icelake/fsp_params.c
@@ -94,15 +94,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
mainboard_silicon_init_params(params);
dev = pcidev_path_on_root(SA_DEVFN_IGD);
-
- if (!dev || !dev->enabled) {
- /*
- * Skip IGD initialization in FSP in case device is disabled
- * in the devicetree.cb.
- */
- params->PeiGraphicsPeimInit = 0;
- } else {
+ if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled)
params->PeiGraphicsPeimInit = 1;
+ else
+ params->PeiGraphicsPeimInit = 0;
+ if (dev && dev->enabled) {
params->GtFreqMax = 2;
params->CdClock = 3;
}