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| author | Angel Pons <th3fanbus@gmail.com> | 2020-09-02 15:29:49 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-09 10:40:40 +0000 |
| commit | eeb4705fff0a831a79d34e88b48a30248f1cfe9d (patch) | |
| tree | f6619ab14a38508fe9eb8de5259c7cbfb03ddf5e /src/soc | |
| parent | 9d63a6b46dd79de611dad8aaeba9bdf071370ee2 (diff) | |
| download | coreboot-eeb4705fff0a831a79d34e88b48a30248f1cfe9d.tar.xz | |
soc/intel/xeon_sp: Select CPU_INTEL_COMMON
This is an intermediate step to have SOC_INTEL_COMMON_BLOCK_CPU select
CPU_INTEL_COMMON directly, to avoid dependency problems.
Tested with BUILD_TIMELESS=1: Without including the config file in the
coreboot.rom, both OCP Tioga Pass and Delta Lake remain identical.
Change-Id: I565e75869be730e7c2fe7114b829941bc9890e6c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45041
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/xeon_sp/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index a4274df99d..31d12fc96e 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -31,6 +31,7 @@ config CPU_SPECIFIC_OPTIONS select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES + select CPU_INTEL_COMMON select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS |