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authorSridhar Siricilla <sridhar.siricilla@intel.com>2019-12-05 19:54:16 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-02-09 19:20:44 +0000
commitf2eb687d19fb5ad6a74f1e938344b6d177765528 (patch)
treebca4bc97bb16902226d31c36bc66bece72c62a59 /src/soc
parent63be9181cba7b05e3ed3578415cbb589ffa9d4c2 (diff)
downloadcoreboot-f2eb687d19fb5ad6a74f1e938344b6d177765528.tar.xz
soc/intel/{cnl,icl,skl,tgl,common}: Make changes to send_heci_reset_req_message()
Below changes have been implemented in send_heci_reset_req_message(): 1. Modify return values to align with other functions in the same file. 2. Add additional logging. 3. Replace macro definitions of reset types with ENUM. 4. Make changes to caller functions to sync with new return values. 5. Rename send_heci_reset_req_message() to cse_request_global_reset(). Test=Verified on hatch board. Change-Id: I979b169a5bb3a5d4028ef030bcef2b8eeffe86e3 Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37584 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/cannonlake/reset.c2
-rw-r--r--src/soc/intel/common/block/cse/cse.c22
-rw-r--r--src/soc/intel/common/block/include/intelblocks/cse.h19
-rw-r--r--src/soc/intel/icelake/reset.c2
-rw-r--r--src/soc/intel/skylake/me.c2
-rw-r--r--src/soc/intel/skylake/reset.c2
-rw-r--r--src/soc/intel/tigerlake/reset.c2
7 files changed, 25 insertions, 26 deletions
diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c
index 4758faf7c5..28211e37ef 100644
--- a/src/soc/intel/cannonlake/reset.c
+++ b/src/soc/intel/cannonlake/reset.c
@@ -24,7 +24,7 @@
void do_global_reset(void)
{
/* Ask CSE to do the global reset */
- if (!send_heci_reset_req_message(GLOBAL_RESET))
+ if (cse_request_global_reset(GLOBAL_RESET))
return;
/* global reset if CSE fail to reset */
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index d323c76b74..c82f3bdc7a 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -582,7 +582,7 @@ uint32_t me_read_config32(int offset)
* Sends GLOBAL_RESET_REQ cmd to CSE.The reset type can be GLOBAL_RESET/
* HOST_RESET_ONLY/CSE_RESET_ONLY.
*/
-int send_heci_reset_req_message(uint8_t rst_type)
+int cse_request_global_reset(enum rst_req_type rst_type)
{
int status;
struct mkhi_hdr reply;
@@ -601,27 +601,25 @@ int send_heci_reset_req_message(uint8_t rst_type)
};
size_t reply_size;
+ printk(BIOS_DEBUG, "HECI: Global Reset(Type:%d) Command\n", rst_type);
if (!((rst_type == GLOBAL_RESET) ||
- (rst_type == HOST_RESET_ONLY) || (rst_type == CSE_RESET_ONLY)))
- return -1;
+ (rst_type == HOST_RESET_ONLY) || (rst_type == CSE_RESET_ONLY))) {
+ printk(BIOS_ERR, "HECI: Unsupported reset type is requested\n");
+ return 0;
+ }
heci_reset();
reply_size = sizeof(reply);
memset(&reply, 0, reply_size);
- printk(BIOS_DEBUG, "HECI: Global Reset(Type:%d) Command\n", rst_type);
if (rst_type == CSE_RESET_ONLY)
- status = heci_send_receive(&msg, sizeof(msg), NULL, 0);
+ status = heci_send(&msg, sizeof(msg), BIOS_HOST_ADDR, HECI_MKHI_ADDR);
else
- status = heci_send_receive(&msg, sizeof(msg), &reply,
- &reply_size);
-
- if (status != 1)
- return -1;
+ status = heci_send_receive(&msg, sizeof(msg), &reply, &reply_size);
- printk(BIOS_DEBUG, "HECI: Global Reset success!\n");
- return 0;
+ printk(BIOS_DEBUG, "HECI: Global Reset %s!\n", status ? "success" : "failure");
+ return status;
}
/* Sends HMRFPO Enable command to CSE */
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h
index 1377bd43fb..aff330a815 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse.h
@@ -112,12 +112,18 @@ void cse_set_host_ready(void);
*/
uint8_t cse_wait_sec_override_mode(void);
+enum rst_req_type {
+ GLOBAL_RESET = 1,
+ HOST_RESET_ONLY = 2,
+ CSE_RESET_ONLY = 3,
+};
+
/*
- * Sends GLOBAL_RESET_REQ cmd to CSE.The reset type can be
- * GLOBAL_RESET/HOST_RESET_ONLY/CSE_RESET_ONLY.
- * Returns -1 on failure and 0 on success.
+ * Sends GLOBAL_RESET_REQ cmd to CSE.
+ * The reset type can be one of the above defined reset type.
+ * Returns 0 on failure and 1 on success.
*/
-int send_heci_reset_req_message(uint8_t rst_type);
+int cse_request_global_reset(enum rst_req_type rst_type);
/*
* Send HMRFPO_ENABLE command.
@@ -138,11 +144,6 @@ int cse_hmrfpo_get_status(void);
/* Fixed Address MEI Header's ME Address field value */
#define HECI_MKHI_ADDR 0x07
-/* Command GLOBAL_RESET_REQ Reset Types */
-#define GLOBAL_RESET 1
-#define HOST_RESET_ONLY 2
-#define CSE_RESET_ONLY 3
-
/* HMRFPO Status types */
/* Host can't access ME region */
#define MKHI_HMRFPO_DISABLED 0
diff --git a/src/soc/intel/icelake/reset.c b/src/soc/intel/icelake/reset.c
index 5526a42545..d79ae455b0 100644
--- a/src/soc/intel/icelake/reset.c
+++ b/src/soc/intel/icelake/reset.c
@@ -24,7 +24,7 @@
void do_global_reset(void)
{
/* Ask CSE to do the global reset */
- if (!send_heci_reset_req_message(GLOBAL_RESET))
+ if (cse_request_global_reset(GLOBAL_RESET))
return;
/* global reset if CSE fail to reset */
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c
index d53d91ebdb..17a66bc618 100644
--- a/src/soc/intel/skylake/me.c
+++ b/src/soc/intel/skylake/me.c
@@ -441,7 +441,7 @@ int send_global_reset(void)
goto ret;
/* ME should be in Normal Mode for this command */
- status = send_heci_reset_req_message(GLOBAL_RESET);
+ status = cse_request_global_reset(GLOBAL_RESET);
ret:
return status;
}
diff --git a/src/soc/intel/skylake/reset.c b/src/soc/intel/skylake/reset.c
index 8f5bf30946..b16e11c923 100644
--- a/src/soc/intel/skylake/reset.c
+++ b/src/soc/intel/skylake/reset.c
@@ -37,7 +37,7 @@ static void do_force_global_reset(void)
void do_global_reset(void)
{
- if (send_global_reset() != 0) {
+ if (!send_global_reset()) {
/* If ME unable to reset platform then
* force global reset using PMC CF9GR register*/
do_force_global_reset();
diff --git a/src/soc/intel/tigerlake/reset.c b/src/soc/intel/tigerlake/reset.c
index 674cf68dcc..11e411da48 100644
--- a/src/soc/intel/tigerlake/reset.c
+++ b/src/soc/intel/tigerlake/reset.c
@@ -24,7 +24,7 @@
void do_global_reset(void)
{
/* Ask CSE to do the global reset */
- if (!send_heci_reset_req_message(GLOBAL_RESET))
+ if (cse_request_global_reset(GLOBAL_RESET))
return;
/* global reset if CSE fail to reset */