summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorJacob Garber <jgarber1@ualberta.ca>2019-07-24 11:12:09 -0600
committerPatrick Georgi <pgeorgi@google.com>2019-09-19 09:28:10 +0000
commit783982751d26161bb1cb0d923375fabd92940a0f (patch)
tree35b7ea01eaeb9049d78b6aeadf1de8d9614c6d53 /src/soc
parente30a0e63b5285bb84ce7cdce5d0c9aabba32c536 (diff)
downloadcoreboot-783982751d26161bb1cb0d923375fabd92940a0f.tar.xz
cpu,mb,soc: Init missing lb_serial struct fields
Initialize the input_hertz and uart_pci_addr fields of the lb_serial struct to prevent later undefined reads in lb_add_serial(). This was done for exynos5420 in commit ff94e00362 (soc/samsung/exynos5420/uart.c: Init new serial struct variables), and this patch finishes the rest. Note that not all of the drivers can have the UART PCI address configured at build time, so a follow-up patch will be needed to correct those ones. Change-Id: I733bc8185e2f2d28a9823495b53d6b09dce4deb1 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Found-by: Coverity CID 1354778 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34548 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/imgtec/pistachio/uart.c2
-rw-r--r--src/soc/mediatek/common/uart.c3
-rw-r--r--src/soc/nvidia/tegra124/uart.c2
-rw-r--r--src/soc/nvidia/tegra210/uart.c2
-rw-r--r--src/soc/qualcomm/ipq40xx/uart.c4
-rw-r--r--src/soc/qualcomm/qcs405/uart.c4
-rw-r--r--src/soc/samsung/exynos5250/uart.c2
7 files changed, 16 insertions, 3 deletions
diff --git a/src/soc/imgtec/pistachio/uart.c b/src/soc/imgtec/pistachio/uart.c
index 3afd5550b1..1eb232aa13 100644
--- a/src/soc/imgtec/pistachio/uart.c
+++ b/src/soc/imgtec/pistachio/uart.c
@@ -150,6 +150,8 @@ void uart_fill_lb(void *data)
serial.baseaddr = CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
serial.baud = get_uart_baudrate();
serial.regwidth = 1 << UART_SHIFT;
+ serial.input_hertz = uart_platform_refclk();
+ serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c
index d4a052f28e..0d4add8fca 100644
--- a/src/soc/mediatek/common/uart.c
+++ b/src/soc/mediatek/common/uart.c
@@ -177,9 +177,10 @@ void uart_fill_lb(void *data)
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = UART0_BASE;
- serial.input_hertz = UART_HZ;
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
+ serial.input_hertz = UART_HZ;
+ serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c
index b1989dd08b..f5f72aff4b 100644
--- a/src/soc/nvidia/tegra124/uart.c
+++ b/src/soc/nvidia/tegra124/uart.c
@@ -135,6 +135,8 @@ void uart_fill_lb(void *data)
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
+ serial.input_hertz = uart_platform_refclk();
+ serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c
index 459cf749a6..904aafa076 100644
--- a/src/soc/nvidia/tegra210/uart.c
+++ b/src/soc/nvidia/tegra210/uart.c
@@ -122,6 +122,8 @@ void uart_fill_lb(void *data)
serial.baseaddr = CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS;
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
+ serial.input_hertz = uart_platform_refclk();
+ serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c
index 95e2eab16d..6e5bac624b 100644
--- a/src/soc/qualcomm/ipq40xx/uart.c
+++ b/src/soc/qualcomm/ipq40xx/uart.c
@@ -292,7 +292,9 @@ void uart_fill_lb(void *data)
serial.baseaddr = (uint32_t)UART1_DM_BASE;
serial.baud = get_uart_baudrate();
serial.regwidth = 1;
-
+ serial.input_hertz = uart_platform_refclk();
+ serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
+
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c
index 6f95ba4ac6..3e980887db 100644
--- a/src/soc/qualcomm/qcs405/uart.c
+++ b/src/soc/qualcomm/qcs405/uart.c
@@ -295,7 +295,9 @@ void uart_fill_lb(void *data)
serial.baseaddr = (uint64_t)UART2_DM_BASE;
serial.baud = get_uart_baudrate();
serial.regwidth = 1;
-
+ serial.input_hertz = uart_platform_refclk();
+ serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
+
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c
index 53290cf8d9..cc851e5d3c 100644
--- a/src/soc/samsung/exynos5250/uart.c
+++ b/src/soc/samsung/exynos5250/uart.c
@@ -192,6 +192,8 @@ void uart_fill_lb(void *data)
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = get_uart_baudrate();
serial.regwidth = 4;
+ serial.input_hertz = uart_platform_refclk();
+ serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);