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authorAaron Durbin <adurbin@chromium.org>2016-11-29 21:37:42 -0600
committerAaron Durbin <adurbin@chromium.org>2016-12-01 08:16:47 +0100
commitafe8aeed81003e941d91e8733ea7459a58d1a4d7 (patch)
treed82bc279ae5fd5b64df1bedd13eada3316616440 /src/soc
parent6c191d8af41859dd94a01c6a868a9186d0120923 (diff)
downloadcoreboot-afe8aeed81003e941d91e8733ea7459a58d1a4d7.tar.xz
lib: put romstage_handoff implementation in own compilation unit
Instead of putting all the functions inline just put the current implementation into a C file. That way all the implementation innards are not exposed. Lastly, fix up the fallout of compilation units not including the headers they actually use. Change-Id: I01fd25d158c0d5016405b73a4d4df3721c281b04 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17648 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/baytrail/romstage/romstage.c1
-rw-r--r--src/soc/intel/braswell/romstage/romstage.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/romstage/romstage.c1
3 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 124eb6ea5f..d4571514e5 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -28,6 +28,7 @@
#include <program_loading.h>
#include <romstage_handoff.h>
#include <stage_cache.h>
+#include <string.h>
#include <timestamp.h>
#include <tpm.h>
#include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c
index 95880e8159..01258476d4 100644
--- a/src/soc/intel/braswell/romstage/romstage.c
+++ b/src/soc/intel/braswell/romstage/romstage.c
@@ -29,6 +29,7 @@
#include <device/pci_def.h>
#include <elog.h>
#include <romstage_handoff.h>
+#include <string.h>
#include <timestamp.h>
#include <reset.h>
#include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
index 49bdedb1ae..49d9a94919 100644
--- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
+++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
@@ -19,6 +19,7 @@
#include <lib.h>
#include <arch/io.h>
#include <arch/cbfs.h>
+#include <cbmem.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <program_loading.h>