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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-07-07 13:15:30 +0200
committerPatrick Rudolph <siro@das-labor.org>2019-08-05 06:17:24 +0000
commitd434e8b1f1bab74451f473af19cad0d9c207453d (patch)
tree1a0eda868a6c8c06233f6cf976c4be362cf355c9 /src/soc
parent17cfba6fd4e13e0930cd7d05e8606ff6966af24a (diff)
downloadcoreboot-d434e8b1f1bab74451f473af19cad0d9c207453d.tar.xz
soc/sifive/fu540: Add opensbi support
Tested on SiFive/unleashed: Boots into Linux until earlycon terminates. Change-Id: I35abacc16f244b95f9fd1947d1a5ea10c4dee097 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34142 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/sifive/fu540/Kconfig8
-rw-r--r--src/soc/sifive/fu540/include/soc/memlayout.ld5
2 files changed, 11 insertions, 2 deletions
diff --git a/src/soc/sifive/fu540/Kconfig b/src/soc/sifive/fu540/Kconfig
index 82b42e5559..97c67bf946 100644
--- a/src/soc/sifive/fu540/Kconfig
+++ b/src/soc/sifive/fu540/Kconfig
@@ -24,6 +24,7 @@ config SOC_SIFIVE_FU540
select DRIVERS_UART_SIFIVE
select RISCV_USE_ARCH_TIMER
select UART_OVERRIDE_REFCLK
+ select RISCV_HAS_OPENSBI
if SOC_SIFIVE_FU540
@@ -47,4 +48,11 @@ config RISCV_WORKING_HARTID
int
default 0
+config OPENSBI_PLATFORM
+ string
+ default "sifive/fu540"
+
+config OPENSBI_TEXT_START
+ hex
+ default 0x80000000
endif
diff --git a/src/soc/sifive/fu540/include/soc/memlayout.ld b/src/soc/sifive/fu540/include/soc/memlayout.ld
index b9b9c479d6..1d11aa0452 100644
--- a/src/soc/sifive/fu540/include/soc/memlayout.ld
+++ b/src/soc/sifive/fu540/include/soc/memlayout.ld
@@ -31,6 +31,7 @@ SECTIONS
L2LIM_END(FU540_L2LIM + 2M)
DRAM_START(FU540_DRAM)
- RAMSTAGE(FU540_DRAM, 256K)
- MEM_STACK(FU540_DRAM + 256K, 20K)
+ REGION(opensbi, FU540_DRAM, 128K, 4K)
+ RAMSTAGE(FU540_DRAM + 128K, 256K)
+ MEM_STACK(FU540_DRAM + 448K, 20K)
}