soc/intel/fsp_broadwell_de: Get rid of device_t

Use of device_t has been abandoned in ramstage.

Change-Id: I68c455d4bc524c2dd2d3ba87ab6641e70c78521c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26589
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

10 files changed, 37 insertions, 35 deletions

diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c
index 4c6417d5d8..0b32388117 100644
--- a/src/soc/intel/fsp_broadwell_de/acpi.c
+++ b/src/soc/intel/fsp_broadwell_de/acpi.c
@@ -82,7 +82,7 @@ static int acpi_sci_irq(void)
 {
 	uint8_t actl = 0;
 	static uint8_t sci_irq = 0;
-	device_t dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));
+	struct device *dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));
 
 	/* If this function was already called, just return the stored value. */
 	if (sci_irq)
@@ -395,7 +395,7 @@ unsigned long northcluster_write_acpi_tables(struct device *const dev,
 					     struct acpi_rsdp *const rsdp)
 {
 	acpi_dmar_t *const dmar = (acpi_dmar_t *)current;
-	device_t vtdev = dev_find_slot(0, PCI_DEVFN(5, 0));
+	struct device *vtdev = dev_find_slot(0, PCI_DEVFN(5, 0));
 
 	/* Create DMAR table only if virtualization is enabled */
 	if (!(pci_read_config32(vtdev, 0x180) & 0x01))
@@ -523,7 +523,7 @@ static void generate_P_state_entries(int core, int cores_per_package)
 	acpigen_pop_len();
 }
 
-void generate_cpu_entries(device_t device)
+void generate_cpu_entries(struct device *device)
 {
 	int core;
 	int pcontrol_blk = get_pmbase(), plen = 6;
diff --git a/src/soc/intel/fsp_broadwell_de/chip.c b/src/soc/intel/fsp_broadwell_de/chip.c
index d0333741c3..2564944aef 100644
--- a/src/soc/intel/fsp_broadwell_de/chip.c
+++ b/src/soc/intel/fsp_broadwell_de/chip.c
@@ -25,7 +25,7 @@
 #include <soc/ramstage.h>
 #include <chip.h>
 
-static void pci_domain_set_resources(device_t dev)
+static void pci_domain_set_resources(struct device *dev)
 {
 	assign_resources(dev->link_list);
 }
@@ -58,7 +58,7 @@ static struct device_operations cpu_bus_ops = {
 	.scan_bus         = NULL,
 };
 
-static void enable_dev(device_t dev)
+static void enable_dev(struct device *dev)
 {
 	printk(BIOS_DEBUG, "enable_dev(%s, %d)\n",
 	       dev_name(dev), dev->path.type);
@@ -89,7 +89,8 @@ struct chip_operations soc_intel_fsp_broadwell_de_ops = {
 	.init = soc_init,
 };
 
-static void pci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void pci_set_subsystem(struct device *dev, unsigned vendor,
+			      unsigned device)
 {
 	if (!vendor || !device) {
 		pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
diff --git a/src/soc/intel/fsp_broadwell_de/cpu.c b/src/soc/intel/fsp_broadwell_de/cpu.c
index d89ae87b1d..a50c839899 100644
--- a/src/soc/intel/fsp_broadwell_de/cpu.c
+++ b/src/soc/intel/fsp_broadwell_de/cpu.c
@@ -116,7 +116,7 @@ static const struct mp_ops mp_ops = {
 	.post_mp_init = post_mp_init
 };
 
-void broadwell_de_init_cpus(device_t dev)
+void broadwell_de_init_cpus(struct device *dev)
 {
 	struct bus *cpu_bus = dev->link_list;
 
@@ -150,7 +150,7 @@ static void configure_mca(void)
 		wrmsr(MSR_IA32_MC0_STATUS + (i * 4), msr);
 }
 
-static void broadwell_de_core_init(device_t cpu)
+static void broadwell_de_core_init(struct device *cpu)
 {
 	printk(BIOS_DEBUG, "Init Broadwell-DE core.\n");
 	configure_mca();
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/ramstage.h b/src/soc/intel/fsp_broadwell_de/include/soc/ramstage.h
index c01c9ac081..785b689558 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/ramstage.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/ramstage.h
@@ -22,8 +22,8 @@
 /* The broadwell_de_init_pre_device() function is called prior to device
  * initialization, but it's after console and cbmem has been reinitialized. */
 void broadwell_de_init_pre_device(void);
-void broadwell_de_init_cpus(device_t dev);
-void southcluster_enable_dev(device_t dev);
+void broadwell_de_init_cpus(struct device *dev);
+void southcluster_enable_dev(struct device *dev);
 
 extern struct pci_operations soc_pci_ops;
 
diff --git a/src/soc/intel/fsp_broadwell_de/northcluster.c b/src/soc/intel/fsp_broadwell_de/northcluster.c
index c15ff5f2fe..709037022b 100644
--- a/src/soc/intel/fsp_broadwell_de/northcluster.c
+++ b/src/soc/intel/fsp_broadwell_de/northcluster.c
@@ -56,7 +56,7 @@ static int add_fixed_resources(struct device *dev, int index)
 	return index;
 }
 
-static void mc_add_dram_resources(device_t dev)
+static void mc_add_dram_resources(struct device *dev)
 {
 	u32 fsp_mem_base, fsp_mem_len;
 	u32 tseg_base, tseg_length;
@@ -120,7 +120,7 @@ static void mc_add_dram_resources(device_t dev)
 	index = add_fixed_resources(dev, index);
 }
 
-static void nc_read_resources(device_t dev)
+static void nc_read_resources(struct device *dev)
 {
 	/* Call the normal read_resources */
 	pci_dev_read_resources(dev);
@@ -129,7 +129,7 @@ static void nc_read_resources(device_t dev)
 	mc_add_dram_resources(dev);
 }
 
-static void nc_enable(device_t dev)
+static void nc_enable(struct device *dev)
 {
 	print_fsp_info();
 }
diff --git a/src/soc/intel/fsp_broadwell_de/ramstage.c b/src/soc/intel/fsp_broadwell_de/ramstage.c
index 7b2f141bf1..7165080b68 100644
--- a/src/soc/intel/fsp_broadwell_de/ramstage.c
+++ b/src/soc/intel/fsp_broadwell_de/ramstage.c
@@ -57,7 +57,7 @@ static const char *stepping_str[] = {
 
 static void fill_in_pattrs(void)
 {
-	device_t dev;
+	struct device *dev;
 	struct pattrs *attrs = (struct pattrs *)pattrs_get();
 
 	attrs->cpuid = cpuid_eax(1);
diff --git a/src/soc/intel/fsp_broadwell_de/smbus.c b/src/soc/intel/fsp_broadwell_de/smbus.c
index 039f84131a..b5870d77cf 100644
--- a/src/soc/intel/fsp_broadwell_de/smbus.c
+++ b/src/soc/intel/fsp_broadwell_de/smbus.c
@@ -26,7 +26,7 @@
 #include <soc/pci_devs.h>
 #include <soc/smbus.h>
 
-static void pch_smbus_init(device_t dev)
+static void pch_smbus_init(struct device *dev)
 {
 	struct resource *res;
 
@@ -36,7 +36,7 @@ static void pch_smbus_init(device_t dev)
 		outb(SMBUS_SLAVE_ADDR, res->base + SMB_RCV_SLVA);
 }
 
-static void pch_smbus_enable(device_t dev)
+static void pch_smbus_enable(struct device *dev)
 {
 	uint8_t reg8;
 
@@ -45,7 +45,7 @@ static void pch_smbus_enable(device_t dev)
 	pci_write_config8(dev, HOSTC, reg8);
 }
 
-static int lsmbus_read_byte(device_t dev, uint8_t address)
+static int lsmbus_read_byte(struct device *dev, uint8_t address)
 {
 	uint16_t device;
 	struct resource *res;
@@ -58,7 +58,7 @@ static int lsmbus_read_byte(device_t dev, uint8_t address)
 	return do_smbus_read_byte(res->base, device, address);
 }
 
-static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t data)
+static int lsmbus_write_byte(struct device *dev, uint8_t address, uint8_t data)
 {
 	uint16_t device;
 	struct resource *res;
diff --git a/src/soc/intel/fsp_broadwell_de/smmrelocate.c b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
index a94693b63a..28bc8c9710 100644
--- a/src/soc/intel/fsp_broadwell_de/smmrelocate.c
+++ b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
@@ -109,7 +109,7 @@ static int bsp_setup_msr_save_state(struct smm_relocation_params *relo_params)
 	smm_mca_cap = rdmsr(SMM_MCA_CAP_MSR);
 	if (smm_mca_cap.hi & SMM_CPU_SVRSTR_MASK) {
 		uint32_t smm_feature_control;
-		device_t dev = PCI_DEV(QPI_BUS, SMM_DEV, SMM_FUNC);
+		pci_devfn_t dev = PCI_DEV(QPI_BUS, SMM_DEV, SMM_FUNC);
 
 		/*
 		 * SMM_FEATURE_CONTROL on Broadwell-DE is not located in
@@ -155,7 +155,7 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
 		 */
 		if (relo_params->smm_save_state_in_msrs) {
 			uint32_t smm_feature_control;
-			device_t dev = PCI_DEV(QPI_BUS, SMM_DEV, SMM_FUNC);
+			pci_devfn_t dev = PCI_DEV(QPI_BUS, SMM_DEV, SMM_FUNC);
 
 			/*
 			 * SMM_FEATURE_CONTROL on Broadwell-DE is not located in
@@ -191,7 +191,7 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
 		write_prmrr(relo_params);
 }
 
-static u32 northbridge_get_base_reg(device_t dev, int reg)
+static u32 northbridge_get_base_reg(pci_devfn_t dev, int reg)
 {
 	u32 value;
 
@@ -201,8 +201,8 @@ static u32 northbridge_get_base_reg(device_t dev, int reg)
 	return value;
 }
 
-static void fill_in_relocation_params(device_t dev,
-					struct smm_relocation_params *params)
+static void fill_in_relocation_params(pci_devfn_t dev,
+				      struct smm_relocation_params *params)
 {
 	u32 tseg_size;
 	u32 tseg_base;
@@ -276,7 +276,7 @@ static void setup_ied_area(struct smm_relocation_params *params)
 void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
 				size_t *smm_save_state_size)
 {
-	device_t dev = PCI_DEV(BUS0, VTD_DEV, VTD_FUNC);
+	pci_devfn_t dev = PCI_DEV(BUS0, VTD_DEV, VTD_FUNC);
 
 	printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
 
@@ -325,7 +325,7 @@ void smm_relocate(void)
 
 void smm_lock(void)
 {
-	device_t dev = PCI_DEV(BUS0, LPC_DEV, LPC_FUNC);
+	pci_devfn_t dev = PCI_DEV(BUS0, LPC_DEV, LPC_FUNC);
 	uint16_t smi_lock;
 
 	/* There is no register to lock SMRAM region on Broadwell-DE.
diff --git a/src/soc/intel/fsp_broadwell_de/southcluster.c b/src/soc/intel/fsp_broadwell_de/southcluster.c
index 8ad27afc72..dff1dd9181 100644
--- a/src/soc/intel/fsp_broadwell_de/southcluster.c
+++ b/src/soc/intel/fsp_broadwell_de/southcluster.c
@@ -39,12 +39,13 @@
 typedef struct soc_intel_fsp_broadwell_de_config config_t;
 
 static inline void
-add_mmio_resource(device_t dev, int i, unsigned long addr, unsigned long size)
+add_mmio_resource(struct device *dev, int i, unsigned long addr,
+		  unsigned long size)
 {
 	mmio_resource(dev, i, addr >> 10, size >> 10);
 }
 
-static void sc_add_mmio_resources(device_t dev)
+static void sc_add_mmio_resources(struct device *dev)
 {
 	add_mmio_resource(dev, 0xfeb0,
 	                       ABORT_BASE_ADDRESS,
@@ -84,8 +85,8 @@ static void sc_add_mmio_resources(device_t dev)
  */
 static void write_pci_config_irqs(void)
 {
-	device_t irq_dev;
-	device_t targ_dev;
+	struct device *irq_dev;
+	struct device *targ_dev;
 	uint8_t int_line = 0;
 	uint8_t original_int_pin = 0;
 	uint8_t new_int_pin = 0;
@@ -168,7 +169,7 @@ static void write_pci_config_irqs(void)
 	printk(BIOS_DEBUG, "PCI_CFG IRQ: Finished writing PCI config space IRQ assignments\n");
 }
 
-static void sc_pirq_init(device_t dev)
+static void sc_pirq_init(struct device *dev)
 {
 	int i;
 	const uint8_t *pirq = global_broadwell_de_irq_route.pic;
@@ -183,7 +184,7 @@ static void sc_pirq_init(device_t dev)
 	}
 }
 
-static void sc_add_io_resources(device_t dev)
+static void sc_add_io_resources(struct device *dev)
 {
 	struct resource *res;
 	u8 io_index = 0;
@@ -210,7 +211,7 @@ static void sc_add_io_resources(device_t dev)
 	pci_write_config8(dev, GPIO_CTRL_OFFSET, GPIO_DECODE_ENABLE);
 }
 
-static void sc_read_resources(device_t dev)
+static void sc_read_resources(struct device *dev)
 {
 	pci_dev_read_resources(dev);
 	sc_add_mmio_resources(dev);
@@ -246,7 +247,7 @@ static void sc_init(struct device *dev)
 /*
  * Common code for the south cluster devices.
  */
-void southcluster_enable_dev(device_t dev)
+void southcluster_enable_dev(struct device *dev)
 {
 	uint32_t reg32;
 
diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c
index 26c6e65741..f60249105d 100644
--- a/src/soc/intel/fsp_broadwell_de/spi.c
+++ b/src/soc/intel/fsp_broadwell_de/spi.c
@@ -266,12 +266,12 @@ void spi_init(void)
 	uint8_t *rcrb; /* Root Complex Register Block */
 	uint32_t rcba; /* Root Complex Base Address */
 	uint8_t bios_cntl;
-	device_t dev;
 	ich9_spi_regs *ich9_spi;
 
 #ifdef __SMM__
-	dev = PCI_DEV(0, 31, 0);
+	pci_devfn_t dev = PCI_DEV(0, 31, 0);
 #else
+	struct device *dev;
 	dev = dev_find_slot(0, PCI_DEVFN(31, 0));
 #endif