diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-05-01 15:24:32 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-01-03 00:27:09 +0100 |
| commit | 20d3d53433fa37eec5b573722f253c7f15d12c52 (patch) | |
| tree | 0da90ab77f3e1b765d3d370eb79ddaffa26f6d5b /src/soc | |
| parent | 989e12bb6387bd06037805dcefa249d998b55b74 (diff) | |
| download | coreboot-20d3d53433fa37eec5b573722f253c7f15d12c52.tar.xz | |
ipq8084: provide monotonic us timer
This service is required by various coreboot code modules. It looks
like the 8064 SOC does not provide anything better than a 32 KHz free
running counter (it is used in u-boot for us timer as well). Let's use
this for now.
BUG=chrome-os-partner:27784
TEST=manual
. with the rest of the patches applied AP148 boots all the way to
trying to start the payload.
Original-Change-Id: I98b91ce179f7388d59c769a59caf49ca7640e047
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/197896
(cherry picked from commit d526830f9d9618e4ca3460165d7b9ecc8ab268cf)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Id37ed21193db67ceee11a795713c34ef26383380
Reviewed-on: http://review.coreboot.org/7993
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/timer.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq806x/timer.c b/src/soc/qualcomm/ipq806x/timer.c index 0d44e4a07d..676c7f53e8 100644 --- a/src/soc/qualcomm/ipq806x/timer.c +++ b/src/soc/qualcomm/ipq806x/timer.c @@ -76,6 +76,11 @@ void udelay(unsigned usec) } while (runcount < val); } +void timer_monotonic_get(struct mono_time *mt) +{ + mono_time_set_usecs(mt, (readl(GPT_COUNT_VAL) * 1000) / GPT_FREQ_KHZ); +} + #if 0 /* |