diff options
author | Vadim Bendebury <vbendeb@chromium.org> | 2014-09-29 12:43:40 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-27 08:06:26 +0100 |
commit | 2d510d01d1eb45af0f8ba2b060748c465243c099 (patch) | |
tree | 322b53b4e113f9ea2980efce10ec803b36fae63f /src/soc | |
parent | ab0f710af735ecf2a8f8ca2dd1d3eeb16b54b818 (diff) | |
download | coreboot-2d510d01d1eb45af0f8ba2b060748c465243c099.tar.xz |
urara: use proper SOC name
Danube has become Pistachio, let's rename all instances where this SOC
is mentioned.
BUG=none
TEST=board urara still builds
Change-Id: Iea91419121eb6ab5665c2f9f95e82f461905268e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 58696cc7c77a70dca2bfd512d695d143e1097a78
Original-Change-Id: Ie5ede401c4f69ed5d832a9eabac008eeac6db62d
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/220401
Original-Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: http://review.coreboot.org/9048
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/imgtec/Kconfig | 2 | ||||
-rw-r--r-- | src/soc/imgtec/Makefile.inc | 2 | ||||
-rw-r--r-- | src/soc/imgtec/pistachio/Kconfig (renamed from src/soc/imgtec/danube/Kconfig) | 6 | ||||
-rw-r--r-- | src/soc/imgtec/pistachio/Makefile.inc (renamed from src/soc/imgtec/danube/Makefile.inc) | 2 | ||||
-rw-r--r-- | src/soc/imgtec/pistachio/bootblock.c (renamed from src/soc/imgtec/danube/bootblock.c) | 0 | ||||
-rw-r--r-- | src/soc/imgtec/pistachio/cbmem.c (renamed from src/soc/imgtec/danube/cbmem.c) | 0 | ||||
-rw-r--r-- | src/soc/imgtec/pistachio/monotonic_timer.c (renamed from src/soc/imgtec/danube/monotonic_timer.c) | 0 | ||||
-rw-r--r-- | src/soc/imgtec/pistachio/romstage.c (renamed from src/soc/imgtec/danube/romstage.c) | 0 | ||||
-rw-r--r-- | src/soc/imgtec/pistachio/spi.c (renamed from src/soc/imgtec/danube/spi.c) | 0 | ||||
-rw-r--r-- | src/soc/imgtec/pistachio/timestamp.c (renamed from src/soc/imgtec/danube/timestamp.c) | 0 | ||||
-rw-r--r-- | src/soc/imgtec/pistachio/uart.c (renamed from src/soc/imgtec/danube/uart.c) | 26 |
11 files changed, 19 insertions, 19 deletions
diff --git a/src/soc/imgtec/Kconfig b/src/soc/imgtec/Kconfig index 4364a94102..df51850f70 100644 --- a/src/soc/imgtec/Kconfig +++ b/src/soc/imgtec/Kconfig @@ -1 +1 @@ -source src/soc/imgtec/danube/Kconfig +source src/soc/imgtec/pistachio/Kconfig diff --git a/src/soc/imgtec/Makefile.inc b/src/soc/imgtec/Makefile.inc index 06ce1d29e2..60a99091a1 100644 --- a/src/soc/imgtec/Makefile.inc +++ b/src/soc/imgtec/Makefile.inc @@ -1 +1 @@ -subdirs-$(CONFIG_CPU_IMGTEC_DANUBE) += danube +subdirs-$(CONFIG_CPU_IMGTEC_PISTACHIO) += pistachio diff --git a/src/soc/imgtec/danube/Kconfig b/src/soc/imgtec/pistachio/Kconfig index b41d267ed4..1acfe39a8c 100644 --- a/src/soc/imgtec/danube/Kconfig +++ b/src/soc/imgtec/pistachio/Kconfig @@ -19,7 +19,7 @@ # MA 02110-1301 USA # -config CPU_IMGTEC_DANUBE +config CPU_IMGTEC_PISTACHIO select CPU_MIPS select DYNAMIC_CBMEM select GENERIC_UDELAY @@ -28,11 +28,11 @@ config CPU_IMGTEC_DANUBE select HAVE_UART_SPECIAL bool -if CPU_IMGTEC_DANUBE +if CPU_IMGTEC_PISTACHIO config BOOTBLOCK_CPU_INIT string - default "soc/imgtec/danube/bootblock.c" + default "soc/imgtec/pistachio/bootblock.c" config BOOTBLOCK_BASE hex diff --git a/src/soc/imgtec/danube/Makefile.inc b/src/soc/imgtec/pistachio/Makefile.inc index 266084839e..1d5e0c2b16 100644 --- a/src/soc/imgtec/danube/Makefile.inc +++ b/src/soc/imgtec/pistachio/Makefile.inc @@ -19,7 +19,7 @@ # MA 02110-1301 USA # -# We enable CBFS_SPI_WRAPPER for Danuibe targets. +# We enable CBFS_SPI_WRAPPER for Pistachio targets. bootblock-y += spi.c romstage-y += spi.c ramstage-y += spi.c diff --git a/src/soc/imgtec/danube/bootblock.c b/src/soc/imgtec/pistachio/bootblock.c index f6cc76b0b9..f6cc76b0b9 100644 --- a/src/soc/imgtec/danube/bootblock.c +++ b/src/soc/imgtec/pistachio/bootblock.c diff --git a/src/soc/imgtec/danube/cbmem.c b/src/soc/imgtec/pistachio/cbmem.c index 5fb6c0e7bd..5fb6c0e7bd 100644 --- a/src/soc/imgtec/danube/cbmem.c +++ b/src/soc/imgtec/pistachio/cbmem.c diff --git a/src/soc/imgtec/danube/monotonic_timer.c b/src/soc/imgtec/pistachio/monotonic_timer.c index a8fe27c9cc..a8fe27c9cc 100644 --- a/src/soc/imgtec/danube/monotonic_timer.c +++ b/src/soc/imgtec/pistachio/monotonic_timer.c diff --git a/src/soc/imgtec/danube/romstage.c b/src/soc/imgtec/pistachio/romstage.c index 53ca898fed..53ca898fed 100644 --- a/src/soc/imgtec/danube/romstage.c +++ b/src/soc/imgtec/pistachio/romstage.c diff --git a/src/soc/imgtec/danube/spi.c b/src/soc/imgtec/pistachio/spi.c index 95bf8272a8..95bf8272a8 100644 --- a/src/soc/imgtec/danube/spi.c +++ b/src/soc/imgtec/pistachio/spi.c diff --git a/src/soc/imgtec/danube/timestamp.c b/src/soc/imgtec/pistachio/timestamp.c index f0dc5ad9cb..f0dc5ad9cb 100644 --- a/src/soc/imgtec/danube/timestamp.c +++ b/src/soc/imgtec/pistachio/timestamp.c diff --git a/src/soc/imgtec/danube/uart.c b/src/soc/imgtec/pistachio/uart.c index 855fce5847..53bf21d226 100644 --- a/src/soc/imgtec/danube/uart.c +++ b/src/soc/imgtec/pistachio/uart.c @@ -142,7 +142,7 @@ static unsigned int uart_baudrate_divisor(unsigned int baudrate, return (1 + (2 * refclk) / (baudrate * oversample)) / 2; } -static void danube_uart_init(void) +static void pistachio_uart_init(void) { u32 base = uart_platform_base(0); if (!base) @@ -154,7 +154,7 @@ static void danube_uart_init(void) uart8250_mem_init(base, div); } -static void danube_uart_tx_byte(unsigned char data) +static void pistachio_uart_tx_byte(unsigned char data) { u32 base = uart_platform_base(0); if (!base) @@ -162,7 +162,7 @@ static void danube_uart_tx_byte(unsigned char data) uart8250_mem_tx_byte(base, data); } -static unsigned char danube_uart_rx_byte(void) +static unsigned char pistachio_uart_rx_byte(void) { u32 base = uart_platform_base(0); if (!base) @@ -170,7 +170,7 @@ static unsigned char danube_uart_rx_byte(void) return uart8250_mem_rx_byte(base); } -static void danube_uart_tx_flush(void) +static void pistachio_uart_tx_flush(void) { u32 base = uart_platform_base(0); if (!base) @@ -180,11 +180,11 @@ static void danube_uart_tx_flush(void) #if !defined(__PRE_RAM__) -static const struct console_driver danube_uart_console __console = { - .init = danube_uart_init, - .tx_byte = danube_uart_tx_byte, - .tx_flush = danube_uart_tx_flush, - .rx_byte = danube_uart_rx_byte, +static const struct console_driver pistachio_uart_console __console = { + .init = pistachio_uart_init, + .tx_byte = pistachio_uart_tx_byte, + .tx_flush = pistachio_uart_tx_flush, + .rx_byte = pistachio_uart_rx_byte, }; uint32_t uartmem_getbaseaddr(void) @@ -196,22 +196,22 @@ uint32_t uartmem_getbaseaddr(void) void uart_init(void) { - danube_uart_init(); + pistachio_uart_init(); } void uart_tx_byte(unsigned char data) { - danube_uart_tx_byte(data); + pistachio_uart_tx_byte(data); } unsigned char uart_rx_byte(void) { - return danube_uart_rx_byte(); + return pistachio_uart_rx_byte(); } void uart_tx_flush(void) { - danube_uart_tx_flush(); + pistachio_uart_tx_flush(); } #endif /* __PRE_RAM__ */ |