diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-11 17:12:26 +0300 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-13 09:58:33 +0000 |
commit | 7f50afb0c79fc041a8533586172cae53284d3c9b (patch) | |
tree | 2294e2a03069bd25028fe5b9d4fb98367e21df34 /src/soc | |
parent | 2cce24dd4b9aa106d3ac2e5519fc84a435813c09 (diff) | |
download | coreboot-7f50afb0c79fc041a8533586172cae53284d3c9b.tar.xz |
drivers/elog: Add elog_boot_notify()
Change-Id: I898188d31fcfd153eb95d0a7324fa9fd85316e3c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/amd/picasso/romstage.c | 4 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/romstage.c | 3 | ||||
-rw-r--r-- | src/soc/intel/baytrail/romstage/romstage.c | 5 | ||||
-rw-r--r-- | src/soc/intel/broadwell/romstage/romstage.c | 6 |
4 files changed, 5 insertions, 13 deletions
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index 9882d9115e..257ae6789d 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -49,12 +49,10 @@ asmlinkage void car_stage_entry(void) console_init(); mainboard_romstage_entry_s3(s3_resume); + elog_boot_notify(s3_resume); if (!s3_resume) { post_code(0x40); - - if (CONFIG(ELOG_BOOT_COUNT)) - boot_count_increment(); } else { printk(BIOS_INFO, "S3 detected\n"); post_code(0x60); diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 4032d3f8b8..2228c1a23e 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -97,6 +97,7 @@ asmlinkage void car_stage_entry(void) load_smu_fw1(); mainboard_romstage_entry_s3(s3_resume); + elog_boot_notify(s3_resume); bsp_agesa_call(); @@ -132,8 +133,6 @@ asmlinkage void car_stage_entry(void) msr_t sys_cfg = rdmsr(SYSCFG_MSR); sys_cfg.lo &= ~SYSCFG_MSR_TOM2WB; wrmsr(SYSCFG_MSR, sys_cfg); - if (CONFIG(ELOG_BOOT_COUNT)) - boot_count_increment(); } else { printk(BIOS_INFO, "S3 detected\n"); post_code(0x60); diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 7348d2b08f..7c129e258e 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -185,10 +185,7 @@ void mainboard_romstage_entry(void) printk(BIOS_DEBUG, "prev_sleep_state = S%d\n", prev_sleep_state); -#if CONFIG(ELOG_BOOT_COUNT) - if (prev_sleep_state != ACPI_S3) - boot_count_increment(); -#endif + elog_boot_notify(prev_sleep_state == ACPI_S3); /* Initialize RAM */ raminit(&mp, prev_sleep_state); diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index ebb72cb62d..96218f4ba4 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -62,6 +62,8 @@ void mainboard_romstage_entry(void) /* Get power state */ rp.power_state = fill_power_state(); + elog_boot_notify(rp.power_state->prev_sleep_state == ACPI_S3); + /* Print useful platform information */ report_platform_info(); @@ -80,10 +82,6 @@ void mainboard_romstage_entry(void) rp.pei_data.boot_mode = rp.power_state->prev_sleep_state; - if (CONFIG(ELOG_BOOT_COUNT) - && rp.power_state->prev_sleep_state != ACPI_S3) - boot_count_increment(); - /* Print ME state before MRC */ intel_me_status(); |