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authorLijian Zhao <lijian.zhao@intel.com>2018-02-05 18:14:11 -0800
committerMartin Roth <martinroth@google.com>2018-02-08 20:02:59 +0000
commit93fde11aefe108fd8f619239fb17f056bea3a778 (patch)
tree4c24e1e5c9db6c955ce35afff6be82d1072079a0 /src/soc
parent6b78b73d79265923cae507e8bd696646ee5ffa7d (diff)
downloadcoreboot-93fde11aefe108fd8f619239fb17f056bea3a778.tar.xz
soc/intel/cannonlake: Add support for EMMC DLL update
Add option to have customized DLL setting for EMMC interface to make EMMC able to run at HS400 speed. BUG=None Change-Id: I38bc022d8c05dd1fbd03dc26aa6f33cd249e8248 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/23600 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/cannonlake/chip.c6
-rw-r--r--src/soc/intel/cannonlake/chip.h7
2 files changed, 12 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index f05b55abf5..68f95d3df3 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -262,6 +262,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* eMMC and SD */
params->ScsEmmcEnabled = config->ScsEmmcEnabled;
params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled;
+ params->PchScsEmmcHs400DllDataValid = config->EmmcHs400DllNeed;
+ if (config->EmmcHs400DllNeed == 1) {
+ params->PchScsEmmcHs400RxStrobeDll1 =
+ config->EmmcHs400RxStrobeDll1;
+ params->PchScsEmmcHs400TxDataDll = config->EmmcHs400TxDataDll;
+ }
params->ScsSdCardEnabled = config->ScsSdCardEnabled;
params->ScsUfsEnabled = config->ScsUfsEnabled;
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index a42494c71d..5d1b714de9 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -155,7 +155,12 @@ struct soc_intel_cannonlake_config {
/* eMMC and SD */
uint8_t ScsEmmcEnabled;
uint8_t ScsEmmcHs400Enabled;
- uint8_t PchScsEmmcHs400TuningRequired;
+ /* Need to update DLL setting to get Emmc running at HS400 speed */
+ uint8_t EmmcHs400DllNeed;
+ /* 0-39: number of active delay for RX strobe, unit is 125 psec */
+ uint8_t EmmcHs400RxStrobeDll1;
+ /* 0-78: number of active delay for TX data, unit is 125 psec */
+ uint8_t EmmcHs400TxDataDll;
uint8_t ScsSdCardEnabled;
uint8_t ScsUfsEnabled;