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| author | Nico Huber <nico.huber@secunet.com> | 2017-07-06 15:02:48 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-07-11 11:34:44 +0000 |
| commit | c587b971ddef8270d7fbd06f5801a6fc75efe3e5 (patch) | |
| tree | ab3c4779adf3f5572878739edcec9c80511f166a /src/soc | |
| parent | 7104fe261841ad40e11656becc6d8f54de53104b (diff) | |
| download | coreboot-c587b971ddef8270d7fbd06f5801a6fc75efe3e5.tar.xz | |
soc/intel/skylake: Set generic I/O decode ranges early
Move the generic I/O decode range setup before the console init.
TEST=Run on kontron/bsl6 which requires 0xa80/0xa81 decoded to
initialize serial ports. Serial console works from boot-
block on.
Change-Id: I9829f188c80eb73f6cd91b0c22e1c07da5745ad6
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20478
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/skylake/bootblock/pch.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c index 780c4aa235..0b212b11b0 100644 --- a/src/soc/intel/skylake/bootblock/pch.c +++ b/src/soc/intel/skylake/bootblock/pch.c @@ -241,6 +241,9 @@ void pch_early_iorange_init(void) lpc_en = CNF1_LPC_EN | COMA_LPC_EN | KBC_LPC_EN | MC_LPC_EN; pci_write_config16(PCH_DEV_LPC, LPC_EN, lpc_en); pcr_write16(PID_DMI, PCR_DMI_LPCIOE, lpc_en); + + /* Program generic IO Decode Range */ + pch_enable_lpc(); } void pch_early_init(void) @@ -266,9 +269,6 @@ void pch_early_init(void) */ pch_interrupt_init(); - /* Program generic IO Decode Range */ - pch_enable_lpc(); - /* Program SMBUS_BASE_ADDRESS and Enable it */ smbus_common_init(); |