diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2018-06-04 10:05:07 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2018-06-05 15:51:27 +0000 |
| commit | ce23d4c6f179358bf84cbdfa678d0435ae3b4cbe (patch) | |
| tree | 6c04f673fc39d2722fd9e60192cff1e6ae0f4dd6 /src/soc | |
| parent | a0ad6e7873188ddb3a096d49548a7464450f914b (diff) | |
| download | coreboot-ce23d4c6f179358bf84cbdfa678d0435ae3b4cbe.tar.xz | |
soc/intel/skylake: Add option to skip coreboot MP init
This patch provides option for mainboard to skip coreboot MP
initialization if required based on use_fsp_mp_init.
Option for mainboard to skip coreboot MP initialization
* 0 = Make use of coreboot MP Init
* 1 = Make use of FSP MP Init
Default coreboot does MP initialization.
Change-Id: I8de24e662963f4600209ad1b110dc950ecfb3a27
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/26818
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip.h | 7 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 2 |
3 files changed, 8 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 1e3fdc6fd2..9fe19d8f9b 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -171,7 +171,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) params->SerialIrqConfigStartFramePulse = config->SerialIrqConfigStartFramePulse; - params->SkipMpInit = config->FspSkipMpInit; + params->SkipMpInit = !config->use_fsp_mp_init; for (i = 0; i < ARRAY_SIZE(config->i2c); i++) params->SerialIoI2cVoltage[i] = config->i2c_voltage[i]; diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 2523554613..8b98662b1e 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -434,7 +434,12 @@ struct soc_intel_skylake_config { SERIAL_IRQ_FRAME_PULSE_8CLK = 2, } SerialIrqConfigStartFramePulse; - u8 FspSkipMpInit; + /* + * Option for mainboard to skip coreboot MP initialization + * 0 = Make use of coreboot MP Init + * 1 = Make use of FSP MP Init + */ + u8 use_fsp_mp_init; /* * VrConfig Settings for 5 domains diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 0ba70e08ab..227e244224 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -387,7 +387,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PchSirqEnable = config->SerialIrqConfigSirqEnable; params->PchSirqMode = config->SerialIrqConfigSirqMode; - params->CpuConfig.Bits.SkipMpInit = config->FspSkipMpInit; + params->CpuConfig.Bits.SkipMpInit = !config->use_fsp_mp_init; for (i = 0; i < ARRAY_SIZE(config->i2c); i++) params->SerialIoI2cVoltage[i] = config->i2c_voltage[i]; |