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authorElyes HAOUAS <ehaouas@noos.fr>2020-04-29 10:12:33 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-01 16:37:47 +0000
commitd2bbc68fa32ec60f8aa83870559beadbef0d1c9f (patch)
tree801c1c9eb4ff7697ba57f20fe66567818d7bd40c /src/soc
parent066e61f3ea1f65012b14467412e6b17351c87dc6 (diff)
downloadcoreboot-d2bbc68fa32ec60f8aa83870559beadbef0d1c9f.tar.xz
soc/intel/baytrail: Fix 16-bit read/write PCI_COMMAND register
Change-Id: I353daf35c843521b089ff8411a9ba8c801605ff9 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40846 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/baytrail/lpe.c2
-rw-r--r--src/soc/intel/baytrail/lpss.c2
-rw-r--r--src/soc/intel/baytrail/scc.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c
index e475defb98..e5b0e8788c 100644
--- a/src/soc/intel/baytrail/lpe.c
+++ b/src/soc/intel/baytrail/lpe.c
@@ -43,7 +43,7 @@ static void lpe_enable_acpi_mode(struct device *dev)
{
static const struct reg_script ops[] = {
/* Disable PCI interrupt, enable Memory and Bus Master */
- REG_PCI_OR32(PCI_COMMAND,
+ REG_PCI_OR16(PCI_COMMAND,
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | (1<<10)),
/* Enable ACPI mode */
REG_IOSF_OR(IOSF_PORT_0x58, LPE_PCICFGCTR1,
diff --git a/src/soc/intel/baytrail/lpss.c b/src/soc/intel/baytrail/lpss.c
index a01310e70a..247bb18f90 100644
--- a/src/soc/intel/baytrail/lpss.c
+++ b/src/soc/intel/baytrail/lpss.c
@@ -21,7 +21,7 @@ static void dev_enable_acpi_mode(struct device *dev, int iosf_reg,
{
struct reg_script ops[] = {
/* Disable PCI interrupt, enable Memory and Bus Master */
- REG_PCI_OR32(PCI_COMMAND,
+ REG_PCI_OR16(PCI_COMMAND,
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | (1<<10)),
/* Enable ACPI mode */
REG_IOSF_OR(IOSF_PORT_LPSS, iosf_reg,
diff --git a/src/soc/intel/baytrail/scc.c b/src/soc/intel/baytrail/scc.c
index 3d5c501038..552d27d1f4 100644
--- a/src/soc/intel/baytrail/scc.c
+++ b/src/soc/intel/baytrail/scc.c
@@ -74,7 +74,7 @@ void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index)
{
struct reg_script ops[] = {
/* Disable PCI interrupt, enable Memory and Bus Master */
- REG_PCI_OR32(PCI_COMMAND,
+ REG_PCI_OR16(PCI_COMMAND,
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | (1<<10)),
/* Enable ACPI mode */
REG_IOSF_OR(IOSF_PORT_SCC, iosf_reg,