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author | Stefan Reinauer <reinauer@chromium.org> | 2013-06-19 12:39:52 -0700 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-12-05 00:38:37 +0100 |
commit | 6a7dd08b1666758de339ff8096d542a3f4499053 (patch) | |
tree | d6bce244812136e7e8f281f7822293b7c7c04fb2 /src/southbridge/Kconfig | |
parent | 9531692ee18553098b951d8bf5a2eaf46e4d76f5 (diff) | |
download | coreboot-6a7dd08b1666758de339ff8096d542a3f4499053.tar.xz |
libpayload: sync ARMv7 arch/io.h with coreboot
On ARMv7 we need to carefully add memory barriers to
all memory read and write operations. This change
brings libpayload in sync with what coreboot is doing.
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Change-Id: Ie9c30b0f0d30531c5f9d99c2729246a86b8cec26
Reviewed-on: https://gerrit.chromium.org/gerrit/59294
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/4316
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/Kconfig')
0 files changed, 0 insertions, 0 deletions