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| author | Dave Frodin <dave.frodin@se-eng.com> | 2013-05-31 08:15:57 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-06-13 22:57:21 +0200 |
| commit | ea90963666af1ba49d524c46c9d3257f9438e6c4 (patch) | |
| tree | 64a4749bb6fcfe01f556136aeced5537f83e124c /src/southbridge/amd/agesa/hudson/Makefile.inc | |
| parent | 9029265cf5d835f2b87fe7e25124706b59df9394 (diff) | |
| download | coreboot-ea90963666af1ba49d524c46c9d3257f9438e6c4.tar.xz | |
AMD Hudson: Add support for the SD controller
This patch provides the correct SD controller timings for
the Family16 device. It also will remove the SD controller
from PCI space when device 0:14.7 is set to off in devicetree.
This was tested on a AMD Parmer board and a AMD G-series SOC
reference board. The settings were found in the AMD
Hudson2 RRG and family16 BKGD.
Change-Id: I6d7e7997ddc39802ab75dc8a211ed29f028c0471
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/3348
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/agesa/hudson/Makefile.inc')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index 7802600c4e..44e030cf9a 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -8,6 +8,8 @@ ramstage-y += sata.c ramstage-y += hda.c ramstage-y += pci.c ramstage-y += pcie.c +ramstage-y += sd.c + ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c ramstage-y += reset.c romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c |