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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-09 08:08:58 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-10 11:17:40 +0000 |
commit | a244d5edd4f45fd9e21db3d97ed0a32eaf089e7b (patch) | |
tree | f3d714cc53ceddf0cbb7319551bd8859bc52e356 /src/southbridge/amd/agesa/hudson/bootblock.c | |
parent | 0a2de7b538e3d6490a8d748bc8b8b9b7511c81bc (diff) | |
download | coreboot-a244d5edd4f45fd9e21db3d97ed0a32eaf089e7b.tar.xz |
sb/amd/{agesa,pi}/hudson: Explicitly enable LPC controller
Location in hudson_lpc_port80() was called conditionally.
Also move hudson_lpc_decode() call after enable_acpimmio_decode_pmXX()
due the change from IO to MMIO using pm_read/write.
Change-Id: I38e94e4b04f0a493052cfd3ffdd0a9c2ac0d07fc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37595
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/southbridge/amd/agesa/hudson/bootblock.c')
-rw-r--r-- | src/southbridge/amd/agesa/hudson/bootblock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c index 6925393b06..4da030b89a 100644 --- a/src/southbridge/amd/agesa/hudson/bootblock.c +++ b/src/southbridge/amd/agesa/hudson/bootblock.c @@ -74,8 +74,8 @@ void bootblock_soc_early_init(void) u32 data; bootblock_southbridge_init(); - hudson_lpc_decode(); enable_acpimmio_decode_pm24(); + hudson_lpc_decode(); if (CONFIG(POST_DEVICE_PCI_PCIE)) hudson_pci_port80(); |