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author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-04-17 11:49:42 -0500 |
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committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-04-17 23:20:12 +0200 |
commit | fa4cb6d606a6017758ae1986fe57aea6ed9b0b2b (patch) | |
tree | c6d80c0db71ea61fb1a4fab2f0a6b018ff77c5dd /src/southbridge/amd/agesa/hudson/hudson.c | |
parent | 09fe3f83c545c162a4ac97e8c41198b8be915e2e (diff) | |
download | coreboot-fa4cb6d606a6017758ae1986fe57aea6ed9b0b2b.tar.xz |
southbridge/hudson: Remove unused function set_sm_enable_bits()
This function isn't used on hudson, and seems to be copy-paste from
older southbridges. It is used in sb700 to enable or disable certain
PCI devices. On hudson, these configuration bits are moved to the PM
space.
Change-Id: I9b967a2d0a5dddc8341204dadeed90460251915c
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5513
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Diffstat (limited to 'src/southbridge/amd/agesa/hudson/hudson.c')
-rw-r--r-- | src/southbridge/amd/agesa/hudson/hudson.c | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c index 8289c7fef6..cd63c3e814 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.c +++ b/src/southbridge/amd/agesa/hudson/hudson.c @@ -60,17 +60,6 @@ void backup_top_of_ram(uint64_t ramtop) } } -void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val) -{ - u32 reg_old, reg; - reg = reg_old = pci_read_config32(sm_dev, reg_pos); - reg &= ~mask; - reg |= val; - if (reg != reg_old) { - pci_write_config32(sm_dev, reg_pos, reg); - } -} - void pm_write8(u8 reg, u8 value) { write8(PM_MMIO_BASE + reg, value); |