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author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-04-14 16:35:34 -0500 |
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committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-04-17 04:42:44 +0200 |
commit | 288c95882d701bb09c77c8ad1a8904673503656c (patch) | |
tree | cb3e8e448e1de1cec866ff0299a95c14042100a4 /src/southbridge/amd/agesa/hudson/hudson.h | |
parent | 22d90e34f95307d143249b53f3bb48f0a674ecbd (diff) | |
download | coreboot-288c95882d701bb09c77c8ad1a8904673503656c.tar.xz |
southbridge/hudson: Add support for ACPI enable/disable via SMI
This enables the ACPI SMI command port in the FADT table, and sets up
the hardware accordingly. If we have SMI enabled, then we don't set
the SCI_EN bit at boot, causing the OS to send the ACPI_ENABLE
command, as required by the ACPI spec. This gives us a chance to hook
into the mainboard_smi_apmc() handler.
Change-Id: Ib4c63d55b3132578dcae48bfe2092d4ea35821dd
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5511
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Diffstat (limited to 'src/southbridge/amd/agesa/hudson/hudson.h')
-rw-r--r-- | src/southbridge/amd/agesa/hudson/hudson.h | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h index 73e7bd4140..86b42385ee 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.h +++ b/src/southbridge/amd/agesa/hudson/hudson.h @@ -29,6 +29,8 @@ #define BIOSRAM_DATA 0xcd5 #define PM_INDEX 0xcd6 #define PM_DATA 0xcd7 +#define PM2_INDEX 0xcd0 +#define PM2_DATA 0xcd1 #define HUDSON_ACPI_IO_BASE 0x800 @@ -46,9 +48,17 @@ #define PM1_TMR_BLK_ADDRESS 0x808 // AcpiPmTmrBlkAddr; #define CPU_CNT_BLK_ADDRESS 0x810 // CpuControlBlkAddr; #define GPE0_BLK_ADDRESS 0x820 // AcpiGpe0BlkAddr; -#define SMI_CMD_PORT 0xB0 // SmiCmdPortAddr; #define SPIROM_BASE_ADDRESS_REGISTER 0xA0 +#define ACPI_SMI_CTL_PORT 0xb2 +#define ACPI_SMI_CMD_CST_CONTROL 0xde +#define ACPI_SMI_CMD_PST_CONTROL 0xad +#define ACPI_SMI_CMD_DISABLE 0xbe +#define ACPI_SMI_CMD_ENABLE 0xef +#define ACPI_SMI_CMD_S4_REQ 0xc0 + +#ifndef __SMM__ + void pm_write8(u8 reg, u8 value); u8 pm_read8(u8 reg); void pm_write16(u8 reg, u16 value); @@ -70,6 +80,7 @@ void hudson_enable(device_t dev); void __attribute__((weak)) hudson_setup_sata_phys(struct device *dev); void s3_resume_init_data(void *FchParams); -#endif +#endif /* __PRE_RAM__ */ +#endif /* __SMM__ */ #endif /* HUDSON_H */ |