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author | zbao <fishbaozi@gmail.com> | 2012-07-13 18:47:03 +0800 |
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committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-07-14 16:29:52 +0200 |
commit | 246e84bc0d04e3e670ca815eca32bcfa3be7e2c2 (patch) | |
tree | 10aadb7c1812235e2572d528a91f339d758f217d /src/southbridge/amd/agesa/hudson/reset.c | |
parent | 22b7a55a4db9d9bfa69113a8e25e86f21ce8ab6e (diff) | |
download | coreboot-246e84bc0d04e3e670ca815eca32bcfa3be7e2c2.tar.xz |
AGESA F15 wrapper for Hudson.
Hudson code has been integrated from CIMx to AGESA. This patch is about the wrapper.
Change-Id: I63d951982140b82a3a77a97eb3d55fc75fc0caa3
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1157
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/amd/agesa/hudson/reset.c')
-rw-r--r-- | src/southbridge/amd/agesa/hudson/reset.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c new file mode 100644 index 0000000000..32ee66b4b5 --- /dev/null +++ b/src/southbridge/amd/agesa/hudson/reset.c @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <reset.h> +#include <arch/io.h> +#include <arch/romcc_io.h> + +#include "../../../northbridge/amd/amdk8/reset_test.c" + +void hard_reset(void) +{ + set_bios_reset(); + /* Try rebooting through port 0xcf9 */ + /* Actually it is not a real hard_reset --- it only reset coherent link table, but not reset link freq and width */ + outb((0 << 3) | (0 << 2) | (1 << 1), 0xcf9); + outb((0 << 3) | (1 << 2) | (1 << 1), 0xcf9); +} |