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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-17 10:34:26 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-24 11:49:15 +0000 |
| commit | c3c55210ee598e2dfcfc0bbe664cd703e6fdf3fe (patch) | |
| tree | 8efb929b92a7c8cfd7cb92042ac628d396e3d6ae /src/southbridge/amd/agesa | |
| parent | 5daa1d38985a19dc84f2299dba2e340dda2870ae (diff) | |
| download | coreboot-c3c55210ee598e2dfcfc0bbe664cd703e6fdf3fe.tar.xz | |
ACPI: Replace smm_setup_structures()
Except for whitespace and varying casts the codes were
the same when implemented.
Platforms that did not implement this are tagged with
ACPI_NO_SMI_GNVS.
Change-Id: I31ec85ebce03d0d472403806969f863e4ca03b6b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/amd/agesa')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/smi.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/southbridge/amd/agesa/hudson/smi.c b/src/southbridge/amd/agesa/hudson/smi.c index 6c7682511b..f54faeb27d 100644 --- a/src/southbridge/amd/agesa/hudson/smi.c +++ b/src/southbridge/amd/agesa/hudson/smi.c @@ -10,11 +10,6 @@ #include "smi.h" -void smm_setup_structures(void *gnvs, void *tcg, void *smi1) -{ - printk(BIOS_DEBUG, "%s STUB!!!\n", __func__); -} - /** Set the EOS bit and enable SMI generation from southbridge */ void global_smi_enable(void) { |