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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-02 16:41:43 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-26 10:05:48 +0000
commit63fac81fc80d701a785ed61a3b5738ea0a821169 (patch)
tree7b50798c95fc1e3ec309351157197784e04131f8 /src/southbridge/amd/agesa
parent8bf978c2aa92aa194d74e6588344f579de5828de (diff)
downloadcoreboot-63fac81fc80d701a785ed61a3b5738ea0a821169.tar.xz
AGESA: Implement POSTCAR_STAGE
Move all boards that have moved away from AGESA_LEGACY_WRAPPER or BINARYPI_LEGACY_WRAPPER to use POSTCAR_STAGE. We use POSTCAR_STAGE as a conditional in CAR teardown to tell our MTRR setup is prepared such that invalidation without writeback is a valid operation. Change-Id: I3f4e2170054bdb84c72d2f7c956f8d51a6d7f0ca Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21384 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/amd/agesa')
-rw-r--r--src/southbridge/amd/agesa/hudson/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc
index 89236a6c0a..2bf6f02539 100644
--- a/src/southbridge/amd/agesa/hudson/Makefile.inc
+++ b/src/southbridge/amd/agesa/hudson/Makefile.inc
@@ -24,6 +24,7 @@ ramstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-y += resume.c ramtop.c
romstage-y += ramtop.c
+postcar-y += ramtop.c
romstage-y += imc.c
ramstage-y += imc.c