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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-01 13:43:02 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-01 20:32:15 +0000 |
| commit | f1b58b78351d7ed220673e688a2f7bc9e96da4e2 (patch) | |
| tree | d8aae223f0e426f189cb4750b972a31e09d46b88 /src/southbridge/amd/agesa | |
| parent | 44e89af6e609874f2f18d30f1e66dce8b5a98eff (diff) | |
| download | coreboot-f1b58b78351d7ed220673e688a2f7bc9e96da4e2.tar.xz | |
device/pci: Fix PCI accessor headers
PCI config accessors are no longer indirectly included
from <arch/io.h> use <device/pci_ops.h> instead.
Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/amd/agesa')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/bootblock.c | 1 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/early_setup.c | 1 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/reset.c | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c index bb6a54ba42..a10068701c 100644 --- a/src/southbridge/amd/agesa/hudson/bootblock.c +++ b/src/southbridge/amd/agesa/hudson/bootblock.c @@ -15,6 +15,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> /* * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF. diff --git a/src/southbridge/amd/agesa/hudson/early_setup.c b/src/southbridge/amd/agesa/hudson/early_setup.c index af0cb58f6c..622931520f 100644 --- a/src/southbridge/amd/agesa/hudson/early_setup.c +++ b/src/southbridge/amd/agesa/hudson/early_setup.c @@ -18,6 +18,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/acpi.h> #include <console/console.h> #include <reset.h> diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c index 83eaa46bb4..64f947eb67 100644 --- a/src/southbridge/amd/agesa/hudson/reset.c +++ b/src/southbridge/amd/agesa/hudson/reset.c @@ -17,6 +17,7 @@ #define __SIMPLE_DEVICE__ #include <arch/io.h> +#include <device/pci_ops.h> #include <cf9_reset.h> #include <reset.h> |