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| author | Nico Huber <nico.huber@secunet.com> | 2013-06-13 14:37:15 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-06-13 22:21:20 +0200 |
| commit | 9029265cf5d835f2b87fe7e25124706b59df9394 (patch) | |
| tree | 0e447c79811b5d526827eb5c414e4e946a2dd424 /src/southbridge/amd/agesa | |
| parent | 5736fab4beb17ea1a04088d1cf16121c57ccf744 (diff) | |
| download | coreboot-9029265cf5d835f2b87fe7e25124706b59df9394.tar.xz | |
libpayload: Fill gaps in the xHCI driver
Well, it turned out to be more as some gaps ;)
but we finally have xHCI running. It's well tested against a QM77 Ivy
Bridge board.
We have no SuperSpeed support (yet). On Ivy Bridge, SuperSpeed is not
advertised and USB 3 devices will just work at HighSpeed.
There are still some bit fields in xhci_private.h, so this might need
little more work to run on ARM.
Change-Id: I7a2cb3f226d24573659142565db38b13acdc218c
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/3452
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/agesa')
0 files changed, 0 insertions, 0 deletions