summaryrefslogtreecommitdiff
path: root/src/southbridge/amd/agesa
diff options
context:
space:
mode:
authorNico Huber <nico.h@gmx.de>2020-04-05 13:55:12 +0200
committerNico Huber <nico.h@gmx.de>2020-04-10 11:25:04 +0000
commita461b694a6c0468cd679628aeebf83437027fb45 (patch)
tree6ba4647074e37d7580ab85683c8aa40358246e4c /src/southbridge/amd/agesa
parent9734325f4568c19d1ffc392084aa431a810a0709 (diff)
downloadcoreboot-a461b694a6c0468cd679628aeebf83437027fb45.tar.xz
Drop unnecessary DEVICE_NOOP entries
Providing an explicit no-op function pointer is only necessary for `.read_resources` and `.set_resources`. All other device-operation pointers are optional and can be NULL. Change-Id: I3d139f7be86180558cabec04b8566873062e33be Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40206 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/agesa')
-rw-r--r--src/southbridge/amd/agesa/hudson/pci.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/amd/agesa/hudson/pci.c b/src/southbridge/amd/agesa/hudson/pci.c
index cacc59d926..60909fa9df 100644
--- a/src/southbridge/amd/agesa/hudson/pci.c
+++ b/src/southbridge/amd/agesa/hudson/pci.c
@@ -36,7 +36,6 @@ static struct device_operations pci_ops = {
.read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources,
- .init = DEVICE_NOOP,
.scan_bus = pci_scan_bridge,
.reset_bus = pci_bus_reset,
.ops_pci = &lops_pci,